Difference between revisions of "Template:AMD Epyc 3000 series"
Jump to navigation
Jump to search
(Add socket) |
m (39 revisions imported) |
||
(One intermediate revision by one other user not shown) | |||
Line 5: | Line 5: | ||
! rowspan=3 | Fab | ! rowspan=3 | Fab | ||
! rowspan=3 | Socket | ! rowspan=3 | Socket | ||
− | ! rowspan=3 | [[Multi-core processor|Cores]]<br />[[thread (computing)| | + | ! rowspan=3 | [[Multi-core processor|Cores]]/[[Floating-point unit|FPUs]]<br />([[thread (computing)|threads]]) |
! colspan=3 | [[Clock rate]] ([[Gigahertz|GHz]]) | ! colspan=3 | [[Clock rate]] ([[Gigahertz|GHz]]) | ||
! colspan=3 | [[Cache memory|Cache]]{{efn-lr|name=kib|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_54945">{{cite web |url=http://developer.amd.com/wordpress/media/2017/11/54945_PPR_Family_17h_Models_00h-0Fh.pdf |format=PDF |title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors |work=AMD Technical Documentation |location=AMD Developer Central |publisher=Advanced Micro Devices, Inc. |date=2017-04-15 |page=25 |accessdate=2019-11-01 }}</ref>}} | ! colspan=3 | [[Cache memory|Cache]]{{efn-lr|name=kib|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_54945">{{cite web |url=http://developer.amd.com/wordpress/media/2017/11/54945_PPR_Family_17h_Models_00h-0Fh.pdf |format=PDF |title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors |work=AMD Technical Documentation |location=AMD Developer Central |publisher=Advanced Micro Devices, Inc. |date=2017-04-15 |page=25 |accessdate=2019-11-01 }}</ref>}} |
Latest revision as of 11:43, 16 October 2020
Model | Release date |
Fab | Socket | Cores/FPUs (threads) |
Clock rate (GHz) | Cache[lower-roman 1] | Memory support |
Ethernet | TDP | Junction temperature (°C) | ||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Base | Boost | L1 | L2 | L3 | ||||||||||
All-core | Max | |||||||||||||
EPYC 3101 | February 2018 | 14nm | SP4r2 | 4 (4) | 2.1 | 2.9 | 2.9 | 64 KB inst. 32 KB data per core |
512 KB per core |
8 MB | DDR4-2666 dual-channel |
4 × 10GbE | 35 W | 0-95 |
EPYC 3151 | 4 (8) | 2.7 | 2.9 | 2.9 | 16 MB | 45 W | ||||||||
EPYC 3201 | 8 (8) | 1.5 | 3.1 | 3.1 | 16 MB | DDR4-2133 dual-channel |
30 W | |||||||
EPYC 3251 | 8 (16) | 2.5 | 3.1 | 3.1 | DDR4-2666 dual-channel |
55 W | 0-105 | |||||||
EPYC 3255 | Template:Unk | 25-55 W | -40-105 | |||||||||||
EPYC 3301 | February 2018 | 12 (12) | 2.0 | 2.15 | 3.0 | 32 MB | DDR4-2666 quad-channel |
8 × 10GbE | 65 W | 0-95 | ||||
EPYC 3351 | SP4 | 12 (24) | 1.9 | 2.75 | 3.0 | 60-80 W | 0-105 | |||||||
EPYC 3401 | SP4r2 | 16 (16) | 1.85 | 2.25 | 3.0 | 32 MB | 85 W | |||||||
EPYC 3451 | SP4 | 16 (32) | 2.15 | 2.45 | 3.0 | 80-100 W |
- ↑ "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). AMD Technical Documentation. AMD Developer Central: Advanced Micro Devices, Inc. 2017-04-15. p. 25. Retrieved 2019-11-01.
Cite error: <ref>
tags exist for a group named "lower-roman", but no corresponding <references group="lower-roman"/>
tag was found, or a closing </ref>
is missing