Difference between revisions of "Template:AMD R1000 series"

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{|class="wikitable" style="text-align:center;"
 
{|class="wikitable" style="text-align:center;"
 
!rowspan=3 | Model
 
!rowspan=3 | Model
!rowspan=3 | Release<br />date
+
!rowspan=3 | Release<br>date
 +
!rowspan=3 | Process
 
!colspan=7 | CPU
 
!colspan=7 | CPU
 
!colspan=4 | GPU
 
!colspan=4 | GPU
!rowspan=3 | [[Memory controller|Memory<br />support]]
+
!rowspan=3 | [[Memory controller|Memory<br>support]]
 
!rowspan=3 | [[Thermal design power|TDP]]
 
!rowspan=3 | [[Thermal design power|TDP]]
 
|-
 
|-
!rowspan=2 | [[Multi-core processor|Cores]]<br />([[thread (computing)|threads]])
+
!rowspan=2 | [[Multi-core processor|Cores]]<br>([[thread (computing)|threads]])
 
!colspan=3 | [[Clock rate]] ([[Gigahertz|GHz]])
 
!colspan=3 | [[Clock rate]] ([[Gigahertz|GHz]])
!colspan=3 | [[Cache memory|Cache]]{{efn|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
+
!colspan=3 | [[Cache memory|Cache]]{{efn-lr|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://developer.amd.com/wordpress/media/2017/11/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
 
!rowspan=2 | Model
 
!rowspan=2 | Model
!rowspan=2 | Config{{efn|name="cconfig"}}
+
!rowspan=2 | Config{{efn-lr|name="cconfig"}}
 
!rowspan=2 | Clock
 
!rowspan=2 | Clock
!rowspan=2 | Processing<br/>power<br/>([[GFLOPS]]){{efn|name="SFLOPS"}}
+
!rowspan=2 | Processing<br>power<br>([[GFLOPS]]){{efn-lr|name="SFLOPS"}}
 
|-
 
|-
 
! {{abbr|Base|3+ active cores}}
 
! {{abbr|Base|3+ active cores}}
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! [[L3 cache|L3]]
 
! [[L3 cache|L3]]
 
|-  
 
|-  
! style="text-align:left;" | R1102G
+
! style="text-align:left;" | R1102G <ref name="Ryzen_R1000_SOC">{{cite web|title=Embedded Processor Specifications|url=https://www.amd.com/en/products/specifications/embedded/11411|website=AMD}}</ref>
| rowspan = 2 | February 25, 2020
+
| rowspan=2 | February 25, 2020
 +
| rowspan=4 | [[Global Foundries|GloFo]]<br>14LP
 
| 2 (2)
 
| 2 (2)
 
| 1.2
 
| 1.2
 
| 2.6
 
| 2.6
 
| {{unk}}
 
| {{unk}}
| rowspan = 4 | 64 KB inst.<br />32 KB data<br />per core
+
| rowspan = 4 | 64KB inst.<br>32 KB data<br><small>per core</small>
| rowspan = 4 | 512 KB<br /> per core
+
| rowspan = 4 | 512KB<br><small>per core</small>
| rowspan = 4 | 4 MB
+
| rowspan = 4 | 4MB
 
| rowspan = 4 | RX Vega 3
 
| rowspan = 4 | RX Vega 3
| rowspan = 4 | 192:12:4<br />3 CU
+
| rowspan = 4 | 192:12:4<br>3 CU
 
| rowspan = 3 | 1000 MHz
 
| rowspan = 3 | 1000 MHz
 
| rowspan = 3 | 384
 
| rowspan = 3 | 384
| DDR4-2400 <small><br />single-channel</small>
+
| DDR4-2400<br><small>single-channel</small>
 
| 6 W
 
| 6 W
 
|-  
 
|-  
! style="text-align:left;" | R1305G
+
! style="text-align:left;" | R1305G<ref name="Ryzen_R1000_SOC" />
| rowspan="3" |2 (4)
+
| rowspan=3 | 2 (4)
 
| 1.5
 
| 1.5
 
| 2.8
 
| 2.8
 
| {{unk}}
 
| {{unk}}
| rowspan=3 |DDR4-2400 <small><br />[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small>
+
| rowspan=3 | DDR4-2400<br><small>[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small>
 
| 8-10 W
 
| 8-10 W
 
|-  
 
|-  
! style="text-align:left;" | R1505G
+
! style="text-align:left;" | R1505G<ref name="Ryzen_R1000_SOC" />
 
| rowspan=2 | April 16, 2019
 
| rowspan=2 | April 16, 2019
 
| 2.4
 
| 2.4
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| rowspan=2 | 12–25 W
 
| rowspan=2 | 12–25 W
 
|-  
 
|-  
! style="text-align:left;" | R1606G
+
! style="text-align:left;" | R1606G<ref name="Ryzen_R1000_SOC" />
 
| 2.6
 
| 2.6
 
| 3.5
 
| 3.5
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|}
 
|}
 
{{navbar|AMD R1000 series|mini=y|plain=y|style=float: right;position: relative;top: -15px;right: 5px;}}
 
{{navbar|AMD R1000 series|mini=y|plain=y|style=float: right;position: relative;top: -15px;right: 5px;}}
{{notelist|refs=
+
{{notelist-lr|refs=
{{efn|name="cconfig"|[[Unified shader model|Unified Shaders]] : [[Texture mapping unit|Texture Mapping Units]] : [[Render output unit|Render Output Units]] and [[Graphics_Core_Next#Compute_units|Compute Units (CU)]]}}
+
{{efn-lr|name=cconfig|[[Unified shader model|Unified Shaders]] : [[Texture mapping unit|Texture Mapping Units]] : [[Render output unit|Render Output Units]] and [[Graphics_Core_Next#Compute_units|Compute Units (CU)]]}}
{{efn|name="SFLOPS"|[[Single-precision floating-point format|Single-precision]] performance is calculated from the base (or boost) core clock speed based on a [[Multiply–accumulate operation#Fused multiply–add|FMA]] operation.}}
+
{{efn-lr|name=SFLOPS|[[Single-precision floating-point format|Single-precision]] performance is calculated from the base (or boost) core clock speed based on a [[Multiply–accumulate operation#Fused multiply–add|FMA]] operation.}}
}}
+
}}<noinclude>
<noinclude>
 
 
{{Template reference list}}
 
{{Template reference list}}
 
[[Category:Advanced Micro Devices products]]</noinclude>
 
[[Category:Advanced Micro Devices products]]</noinclude>

Latest revision as of 11:45, 16 October 2020

Model Release
date
Process CPU GPU Memory
support
TDP
Cores
(threads)
Clock rate (GHz) Cache[lower-roman 1] Model Config[lower-roman 2] Clock Processing
power
(GFLOPS)[lower-roman 3]
Base Boost XFR L1 L2 L3
R1102G [2] February 25, 2020 GloFo
14LP
2 (2) 1.2 2.6 Template:Unk 64KB inst.
32 KB data
per core
512KB
per core
4MB RX Vega 3 192:12:4
3 CU
1000 MHz 384 DDR4-2400
single-channel
6 W
R1305G[2] 2 (4) 1.5 2.8 Template:Unk DDR4-2400
dual-channel
8-10 W
R1505G[2] April 16, 2019 2.4 3.3 Template:Unk 12–25 W
R1606G[2] 2.6 3.5 Template:Unk 1200 MHz 460.8

Template:Notelist-lr

References

  1. "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors. AMD. Retrieved 14 July 2017.
  2. 2.0 2.1 2.2 2.3 "Embedded Processor Specifications". AMD.


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