Difference between revisions of "Template:Computer bus"
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imported>Jeh (Undid revision 751483686 by 85.144.5.167 (talk) rmv ps/2 port. It's not a bus) |
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* [[Address bus]] | * [[Address bus]] | ||
* [[Bus contention]] | * [[Bus contention]] | ||
| + | * [[Bus mastering]] | ||
* [[Network on a chip]] | * [[Network on a chip]] | ||
* [[Plug and play]] | * [[Plug and play]] | ||
| − | * [[List of | + | * [[List of interface bit rates#Computer buses|List of bus bandwidths]] |
|group2 = Standards | |group2 = Standards | ||
| Line 22: | Line 23: | ||
* [[SS-50 bus]] | * [[SS-50 bus]] | ||
* [[S-100 bus]] | * [[S-100 bus]] | ||
| + | * [[Multibus]] | ||
* [[Unibus]] | * [[Unibus]] | ||
* [[VAXBI Bus|VAXBI]] | * [[VAXBI Bus|VAXBI]] | ||
| Line 50: | Line 52: | ||
* [[GSC bus|HP GSC bus]] | * [[GSC bus|HP GSC bus]] | ||
* [[InfiniBand]] | * [[InfiniBand]] | ||
| + | * [[Ethernet]] | ||
* [[Ultra Port Architecture|UPA]] | * [[Ultra Port Architecture|UPA]] | ||
* [[PCI-X|PCI Extended (PCI-X)]] | * [[PCI-X|PCI Extended (PCI-X)]] | ||
* [[Accelerated Graphics Port|AGP]] | * [[Accelerated Graphics Port|AGP]] | ||
* [[PCI Express|PCI Express (PCIe)]] | * [[PCI Express|PCI Express (PCIe)]] | ||
| + | * [[Compute Express Link|Compute Express Link (CXL)]] | ||
* [[Direct Media Interface|Direct Media Interface (DMI)]] | * [[Direct Media Interface|Direct Media Interface (DMI)]] | ||
* [[RapidIO]] | * [[RapidIO]] | ||
* [[Intel QuickPath Interconnect]] | * [[Intel QuickPath Interconnect]] | ||
| + | * [[NVLink]] | ||
* [[HyperTransport]] | * [[HyperTransport]] | ||
| + | ** [[Infinity Fabric]] | ||
| + | * [[Intel Ultra Path Interconnect]] | ||
|group3 = Storage | |group3 = Storage | ||
|list3 = | |list3 = | ||
| − | * [[ST-506]] | + | * [[ST506/ST412|ST-506]] |
* [[Enhanced Small Disk Interface|ESDI]] | * [[Enhanced Small Disk Interface|ESDI]] | ||
| + | * [[Intelligent Peripheral Interface|IPI]] | ||
* [[Storage Module Device|SMD]] | * [[Storage Module Device|SMD]] | ||
* [[Parallel ATA|Parallel ATA (PATA)]] | * [[Parallel ATA|Parallel ATA (PATA)]] | ||
| Line 69: | Line 77: | ||
* [[HIPPI]] | * [[HIPPI]] | ||
* [[Serial ATA|Serial ATA (SATA)]] | * [[Serial ATA|Serial ATA (SATA)]] | ||
| − | |||
| − | |||
| − | |||
* [[SCSI]] | * [[SCSI]] | ||
| − | * [[Parallel SCSI]] | + | ** [[Parallel SCSI|Parallel]] |
| − | * [[Serial | + | ** [[Serial Attached SCSI|SAS]] |
* [[Fibre Channel]] | * [[Fibre Channel]] | ||
| − | * [[SATA Express]] | + | * [[SATA Express|SATAe]] |
| − | * [[ | + | * PCI Express <small>(via [[Advanced Host Controller Interface|AHCI]] or [[NVM Express|NVMe]] logical device interface)</small> |
|group4 = Peripheral | |group4 = Peripheral | ||
|list4 = | |list4 = | ||
* [[Apple Desktop Bus]] | * [[Apple Desktop Bus]] | ||
| + | * [[Atari SIO]] | ||
| + | * [[Digital Control Bus|DCB]] | ||
| + | * [[Commodore bus]] | ||
| + | * [[HP-IL]] | ||
* [[HIL bus|HIL]] | * [[HIL bus|HIL]] | ||
* [[MIDI]] | * [[MIDI]] | ||
| − | |||
* [[RS-232]] | * [[RS-232]] | ||
* [[RS-422]] | * [[RS-422]] | ||
* [[RS-423]] | * [[RS-423]] | ||
* [[RS-485]] | * [[RS-485]] | ||
| + | * [[Lightning (connector)|Lightning]] | ||
* [[DMX512#DMX512-A|DMX512-A]] | * [[DMX512#DMX512-A|DMX512-A]] | ||
* [[IEEE-488|IEEE-488 (GPIB)]] | * [[IEEE-488|IEEE-488 (GPIB)]] | ||
* [[IEEE 1284|IEEE-1284 (parallel port)]] | * [[IEEE 1284|IEEE-1284 (parallel port)]] | ||
* [[UNI/O]] | * [[UNI/O]] | ||
| − | |||
* [[1-Wire]] | * [[1-Wire]] | ||
| + | * [[I²C]] ([[ACCESS.bus]], [[Power Management Bus|PMBus]], [[System Management Bus|SMBus]]) | ||
| + | * [[I3C (bus)|I3C]] | ||
| + | * [[Serial Peripheral Interface Bus|SPI]] | ||
* [[IEC 61030|D²B]] | * [[IEC 61030|D²B]] | ||
| − | |||
| − | |||
* [[Parallel SCSI]] | * [[Parallel SCSI]] | ||
* [[Profibus]] | * [[Profibus]] | ||
| + | * [[IEEE 1394|IEEE 1394 (FireWire)]] | ||
* [[USB]] | * [[USB]] | ||
| − | |||
* [[Camera Link]] | * [[Camera Link]] | ||
* [[PCI Express#PCI Express External Cabling|External PCIe]] | * [[PCI Express#PCI Express External Cabling|External PCIe]] | ||
| Line 126: | Line 135: | ||
* [[Multidrop bus]] | * [[Multidrop bus]] | ||
* [[CoreConnect]] | * [[CoreConnect]] | ||
| − | * [[Advanced Microcontroller Bus Architecture|AMBA]] | + | * [[Advanced Microcontroller Bus Architecture|AMBA]] ([[Advanced eXtensible Interface|AXI]]) |
* [[Wishbone (computer bus)|Wishbone]] | * [[Wishbone (computer bus)|Wishbone]] | ||
| + | * [[SLIMbus]] | ||
|below = <small>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.</small><br />{{icon|category}} [[:Category:Computer buses|Category]] | |below = <small>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.</small><br />{{icon|category}} [[:Category:Computer buses|Category]] | ||
Latest revision as of 18:07, 14 September 2020
Usage
{{Computer bus}}
See also
- {{802.11 network standards}} (wireless)
- {{CPU technologies}}
- {{DRAM}}
- {{Memory types}}
- {{Solid-state Drive}}
- {{Automation protocols}}
| The above documentation is transcluded from Template:Computer bus/doc. (edit | history) Editors can experiment in this template's sandbox (create | mirror) and testcases (create) pages. Please add categories to the /doc subpage. Subpages of this template. |