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'''cpulist''' is a template for maintaining lists of microprocessors with separate content and markup.
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{{documentation subpage}}
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'''cpulist''' is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from [[:Template:Intel processors]] to this template, in order to give them all a consistent appearance.
  
 
As a simple example,
 
As a simple example,
  
 
  <nowiki> {{cpulist|nehalem|head}}
 
  <nowiki> {{cpulist|nehalem|head}}
  {{cpulist|nehalem|gainestown|links=1|model=Xeon E5502|sspec1=SLBEZ|step1=D0|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|part1=AT80602000804AA|price=$188}}
+
  {{cpulist|nehalem|gainestown|model=Xeon E5502
  {{end}}</nowiki>
+
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
 +
  |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
 +
  {{cpulist|nehalem|end}}</nowiki>
  
 
results in a table like
 
results in a table like
 
  {{cpulist|nehalem|head}}
 
  {{cpulist|nehalem|head}}
  {{cpulist|nehalem|gainestown|links=1|model=Xeon E5502|sspec1=SLBEZ|step1=D0|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|part1=AT80602000804AA|price=$188}}
+
  {{cpulist|nehalem|gainestown|model=Xeon E5502
  {{end}}
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|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
 +
  |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
 +
  {{cpulist|nehalem|end}}
  
The first argument to the cpulist template, ''nehalem'' in the example, defines the layout of the table. Currently, valid arguments here are
+
Making changes to the cpulist template affects all articles using it, see [[Special:WhatLinksHere/Template:Cpulist]] for a list.
  
* nehalem: For lists of Intel's latest generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
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Here is the list of cpulist sub-templates:
* core: For lists of Intel's previous generation of processors
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{{Special:Prefixindex/Template:Cpulist/}}
  
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently
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== Template arguments==
 +
The first argument to the cpulist template, ''nehalem'' in the example, defines the layout of the table. Currently, valid arguments here are
 +
* [[Template:cpulist/lake-e|lake-e]] For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
 +
* [[Template:cpulist/skylake|skylake]] For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
 +
* [[Template:cpulist/silvermont|silvermont]] For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
 +
* [[Template:cpulist/haswell|haswell]]: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
 +
* [[Template:cpulist/bridge-e|bridge-e]]: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
 +
* [[Template:cpulist/bridge|bridge]]: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
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* [[Template:cpulist/sandybridge|sandybridge]]: For lists of the previous Sandy Bridge processors, currently same format as ''bridge''
 +
* [[Template:cpulist/nehalem|nehalem]]: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
 +
* [[Template:cpulist/nehgfx|nehgfx]]: like nehalem, but for chips with integrated graphics capability
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* [[Template:cpulist/atom|atom]]: For lists of low-end Atom processors, currently same format as ''core''
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* [[Template:cpulist/atomx3|atomx3]]: For lists of Atom processors
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* [[Template:cpulist/atomgfx|atomgfx]]: For lists of Atom processors with integrated graphics
 +
* [[Template:cpulist/core|core]]: For lists of Intel's previous generation of processors
 +
* [[Template:cpulist/p6|p6]]: For lists of Intel's p6 generation of processors
 +
* [[Template:cpulist/p5|p5]]: For lists of Intel's p5 generation of processors
  
 +
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:
 
* head: A special argument, resulting in a table header
 
* head: A special argument, resulting in a table header
* [[Lynnfield (microprocessor)|lynnfield]]
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* [[Tiger Lake (microprocessor)|tigerlake, willowcove]]
* [[Bloomfield (microprocessor)|bloomfield]]
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* [[Ice Lake (microprocessor)|icelake, sunnycove]]
* [[Clarksfield (microprocessor)|clarksfield]]
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* [[Kaby Lake|kabylake_x]]
* [[Gainestown (microprocessor)|gainestown]]
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* [[Skylake (microarchitecture)|skylake, skylake_e]]
 +
* [[Silvermont|baytrail]]
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* [[Haswell (microarchitecture)|haswell]]
 +
* [[Ivy Bridge (microarchitecture)|ivybridge]]
 +
* [[Sandy Bridge (microarchitecture)|sandybridge]]
 +
* [[Sandy Bridge-E|sandybridge_e]]
 
* [[Gulftown (microprocessor)|gulftown]]
 
* [[Gulftown (microprocessor)|gulftown]]
 +
* [[Gulftown (microprocessor)|gulftownup]]
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* [[Clarkdale (microprocessor)|clarkdale]]
 
* [[Arrandale (microprocessor)|arrandale]]
 
* [[Arrandale (microprocessor)|arrandale]]
* [[Clarkdale (microprocessor)|clarkdale]]
 
 
* [[Beckton (microprocessor)|beckton]]
 
* [[Beckton (microprocessor)|beckton]]
 
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* [[Bloomfield (microprocessor)|bloomfield]]
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* [[Gainestown (microprocessor)|gainestown]]
 +
* [[Lynnfield (microprocessor)|lynnfield]]
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* [[Clarksfield (microprocessor)|clarksfield]]
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* [[Jasper Forest (microprocessor)|jasperforest]]
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* [[Intel Atom|diamondville]]
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* [[Intel Atom|silverthorne]]
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* [[Intel Atom|pineview]]
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* [[Dunnington (microprocessor)|dunnington]]
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* [[Harpertown (microprocessor)|harpertown]]
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* [[Yorkfield (microprocessor)|yorkfield]]
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* [[Wolfdale (microprocessor)|wolfdale]]
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* [[Penryn (microprocessor)|penryn, penrynulv]]
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* [[Tigerton (microprocessor)|tigerton]]
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* [[Clovertown (microprocessor)|clovertown]]
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* [[Kentsfield (microprocessor)|kentsfield]]
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* [[Woodcrest (microprocessor)|woodcrest]]
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* [[Conroe (microprocessor)|conroe]]
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* [[Merom (microprocessor)|merom]]
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* [[Sossaman (microprocessor)|sossaman]]
 +
* [[Yonah (microprocessor)|yonah]]
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* [[Dothan (microprocessor)|dothan]]
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* [[Banias (microprocessor)|banias]]
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* [[Tillamook (microprocessor)|tillamook]]
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* [[P5 (microprocessor)|p5]]
  
 
Other arguments are
 
Other arguments are
* model: The name of the processor
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* {{para|anchor}}: An arbitrary HTML anchor that can be assigned to an entry
* sspec1: up to four Intel sSpec numbers, as sspec1 through sspec4
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* {{para|model}}: The name of the processor
* step1: up to four stepping names for the above sPec numbers, as step1 through step4
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* {{para|sspec}} or {{para|sspec1}}…{{para|sspec8}}: up to 8 Intel sSpec numbers
* freq: Core frequency, can often be determined by ''fsb'' and ''mult'' arguments, in MHz or GHz
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** {{para|step1}}…{{para|step8}}: up to 8 stepping names for the above sSpec numbers
* turbo: Turbo frequencies for Intel Nehalem processors, as increments in clock multiplier
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* {{para|freq}}: Core frequency, can often be determined by ''fsb'' and ''mult'' arguments, in MHz or GHz
* gfxfreq: clock frequency of the integrated graphics, if applicable
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* {{para|uncore}}: Uncore frequency, in MHz or GHz
* l2: size of the Level 2 Cache, in MB
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* {{para|turbo}}: Turbo frequencies , as increments in clock multiplier
* l3: size of the Level 3 Cache, in MB
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* {{para|burst}}: Burst frequencies , in GHz
* iobus: Type and speed of I/O bus interface, may be expressed as one of
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* {{para|igp}}: Model of integrated graphics processor
** fsb: performance of Front-Side bus in MT/s, if applicable
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* {{para|gfxfreq}}: clock frequency of the integrated graphics, if applicable
** ht: performance of Hypertransport in MT/s, if applicable
+
* {{para|cores}}: number of processor cores
** qpi: performance of Quickpath interface in MT/s, if applicable
+
** {{para|threads}}: number of processor threads
** dmi: set to 1 if Direct media interface is in use
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* {{para|l1}}: size of the Level 1 Cache, in KB
* mult: clock multiplier of fsb or base frequency
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* {{para|l2}}: size of the Level 2 Cache, in KB or MB
* mem: memory interface of integrated memory controller, may be expressed as
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* {{para|l3}}: size of the Level 3 Cache, in MB
** memspeed: data rate of integrated memory controller
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* {{para|iobus}}: Type and speed of I/O bus interface, may be expressed as one of
* volt: core voltage range, usually given as
+
** {{para|fsb}}: performance of Front-side bus in MT/s, if applicable
** vmin: minimum voltage in Volt
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** {{para|ht}}: performance of Hypertransport in MT/s, if applicable
** vmax: maximum voltage (optional) in Volt
+
** {{para|qpi}}: performance of Quickpath interface in MT/s, if applicable
* tdp: Thermal design power in Watt
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** {{para|dmi}}: set to 1 if Direct media interface is in use
* sock: Socket, one of 1366, 1156, 775, 771
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* {{para|mult}}: clock multiplier of fsb or base frequency
* date: release date
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* {{para|mem}}: memory interface of integrated memory controller, may be expressed as
* part1: part number or order code, up to four, as part1 through part4
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** {{para|memspeed}}: data rate of integrated memory controller
* price: price in USD at the time of release
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* {{para|volt}}: core voltage range, usually given as
 +
** {{para|vmin}}: minimum voltage in volts
 +
** {{para|vmax}}: maximum voltage (optional) in volts
 +
* {{para|tdp}} or {{para|tdp1}}…{{para|tdp8}}: Thermal design power in watts
 +
* {{para|sdp}}: Scenario design power in watts
 +
* {{para|sock}} or {{para|sock1}}…{{para|sock8}}: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others
 +
* {{para|date}}: release date
 +
* {{para|part}} or {{para|part1}}…{{para|part8}}: part numbers
 +
* {{para|price}}: price in USD at the time of release
  
 
A special argument is
 
A special argument is
* links: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table
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* {{para|links}}: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table
 +
 
 +
<includeonly>{{sandbox other||
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<!-- Template Categories; Interwiki links should be migrated to Wikidata sitelinks -->
 +
}}</includeonly>

Latest revision as of 21:43, 2 September 2020

cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.

As a simple example,

 {{cpulist|nehalem|head}}
 {{cpulist|nehalem|gainestown|model=Xeon E5502
 |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
   |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
 {{cpulist|nehalem|end}}

results in a table like

Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Xeon E5502
  • SLBEZ (D0)
1.87 GHz N/A 4 4 × 256 KiB 4 MiB 2 × 4.8 GT/s QPI 14× 3 × DDR3-800 0.75–1.35 V
80 W
LGA 1366 March 30, 2009
  • AT80602000804AA
$188
Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)

Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.

Here is the list of cpulist sub-templates:

Template arguments

The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are

  • lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
  • skylake For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
  • silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
  • haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
  • bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • sandybridge: For lists of the previous Sandy Bridge processors, currently same format as bridge
  • nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
  • nehgfx: like nehalem, but for chips with integrated graphics capability
  • atom: For lists of low-end Atom processors, currently same format as core
  • atomx3: For lists of Atom processors
  • atomgfx: For lists of Atom processors with integrated graphics
  • core: For lists of Intel's previous generation of processors
  • p6: For lists of Intel's p6 generation of processors
  • p5: For lists of Intel's p5 generation of processors

The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:

Other arguments are

  • |anchor=: An arbitrary HTML anchor that can be assigned to an entry
  • |model=: The name of the processor
  • |sspec= or |sspec1=|sspec8=: up to 8 Intel sSpec numbers
    • |step1=|step8=: up to 8 stepping names for the above sSpec numbers
  • |freq=: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz
  • |uncore=: Uncore frequency, in MHz or GHz
  • |turbo=: Turbo frequencies , as increments in clock multiplier
  • |burst=: Burst frequencies , in GHz
  • |igp=: Model of integrated graphics processor
  • |gfxfreq=: clock frequency of the integrated graphics, if applicable
  • |cores=: number of processor cores
    • |threads=: number of processor threads
  • |l1=: size of the Level 1 Cache, in KB
  • |l2=: size of the Level 2 Cache, in KB or MB
  • |l3=: size of the Level 3 Cache, in MB
  • |iobus=: Type and speed of I/O bus interface, may be expressed as one of
    • |fsb=: performance of Front-side bus in MT/s, if applicable
    • |ht=: performance of Hypertransport in MT/s, if applicable
    • |qpi=: performance of Quickpath interface in MT/s, if applicable
    • |dmi=: set to 1 if Direct media interface is in use
  • |mult=: clock multiplier of fsb or base frequency
  • |mem=: memory interface of integrated memory controller, may be expressed as
    • |memspeed=: data rate of integrated memory controller
  • |volt=: core voltage range, usually given as
    • |vmin=: minimum voltage in volts
    • |vmax=: maximum voltage (optional) in volts
  • |tdp= or |tdp1=|tdp8=: Thermal design power in watts
  • |sdp=: Scenario design power in watts
  • |sock= or |sock1=|sock8=: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others
  • |date=: release date
  • |part= or |part1=|part8=: part numbers
  • |price=: price in USD at the time of release

A special argument is

  • |links=: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table