Difference between revisions of "Template:Cpulist/doc"
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− | '''cpulist''' is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert [[ | + | {{documentation subpage}} |
+ | '''cpulist''' is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from [[:Template:Intel processors]] to this template, in order to give them all a consistent appearance. | ||
As a simple example, | As a simple example, | ||
Line 7: | Line 8: | ||
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1 | |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1 | ||
|sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}} | |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}} | ||
− | {{end}}</nowiki> | + | {{cpulist|nehalem|end}}</nowiki> |
results in a table like | results in a table like | ||
Line 14: | Line 15: | ||
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1 | |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1 | ||
|sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}} | |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}} | ||
− | {{end}} | + | {{cpulist|nehalem|end}} |
Making changes to the cpulist template affects all articles using it, see [[Special:WhatLinksHere/Template:Cpulist]] for a list. | Making changes to the cpulist template affects all articles using it, see [[Special:WhatLinksHere/Template:Cpulist]] for a list. | ||
+ | |||
+ | Here is the list of cpulist sub-templates: | ||
+ | {{Special:Prefixindex/Template:Cpulist/}} | ||
== Template arguments== | == Template arguments== | ||
The first argument to the cpulist template, ''nehalem'' in the example, defines the layout of the table. Currently, valid arguments here are | The first argument to the cpulist template, ''nehalem'' in the example, defines the layout of the table. Currently, valid arguments here are | ||
− | + | * [[Template:cpulist/lake-e|lake-e]] For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency | |
− | * [[Template:cpulist/nehalem|nehalem]]: For lists of Intel's | + | * [[Template:cpulist/skylake|skylake]] For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field |
+ | * [[Template:cpulist/silvermont|silvermont]] For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency | ||
+ | * [[Template:cpulist/haswell|haswell]]: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date | ||
+ | * [[Template:cpulist/bridge-e|bridge-e]]: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date | ||
+ | * [[Template:cpulist/bridge|bridge]]: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date | ||
+ | * [[Template:cpulist/sandybridge|sandybridge]]: For lists of the previous Sandy Bridge processors, currently same format as ''bridge'' | ||
+ | * [[Template:cpulist/nehalem|nehalem]]: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller | ||
* [[Template:cpulist/nehgfx|nehgfx]]: like nehalem, but for chips with integrated graphics capability | * [[Template:cpulist/nehgfx|nehgfx]]: like nehalem, but for chips with integrated graphics capability | ||
* [[Template:cpulist/atom|atom]]: For lists of low-end Atom processors, currently same format as ''core'' | * [[Template:cpulist/atom|atom]]: For lists of low-end Atom processors, currently same format as ''core'' | ||
+ | * [[Template:cpulist/atomx3|atomx3]]: For lists of Atom processors | ||
* [[Template:cpulist/atomgfx|atomgfx]]: For lists of Atom processors with integrated graphics | * [[Template:cpulist/atomgfx|atomgfx]]: For lists of Atom processors with integrated graphics | ||
* [[Template:cpulist/core|core]]: For lists of Intel's previous generation of processors | * [[Template:cpulist/core|core]]: For lists of Intel's previous generation of processors | ||
* [[Template:cpulist/p6|p6]]: For lists of Intel's p6 generation of processors | * [[Template:cpulist/p6|p6]]: For lists of Intel's p6 generation of processors | ||
+ | * [[Template:cpulist/p5|p5]]: For lists of Intel's p5 generation of processors | ||
− | The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently | + | The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently: |
− | |||
* head: A special argument, resulting in a table header | * head: A special argument, resulting in a table header | ||
+ | * [[Tiger Lake (microprocessor)|tigerlake, willowcove]] | ||
+ | * [[Ice Lake (microprocessor)|icelake, sunnycove]] | ||
+ | * [[Kaby Lake|kabylake_x]] | ||
+ | * [[Skylake (microarchitecture)|skylake, skylake_e]] | ||
+ | * [[Silvermont|baytrail]] | ||
+ | * [[Haswell (microarchitecture)|haswell]] | ||
+ | * [[Ivy Bridge (microarchitecture)|ivybridge]] | ||
+ | * [[Sandy Bridge (microarchitecture)|sandybridge]] | ||
+ | * [[Sandy Bridge-E|sandybridge_e]] | ||
* [[Gulftown (microprocessor)|gulftown]] | * [[Gulftown (microprocessor)|gulftown]] | ||
+ | * [[Gulftown (microprocessor)|gulftownup]] | ||
* [[Clarkdale (microprocessor)|clarkdale]] | * [[Clarkdale (microprocessor)|clarkdale]] | ||
* [[Arrandale (microprocessor)|arrandale]] | * [[Arrandale (microprocessor)|arrandale]] | ||
Line 39: | Line 60: | ||
* [[Lynnfield (microprocessor)|lynnfield]] | * [[Lynnfield (microprocessor)|lynnfield]] | ||
* [[Clarksfield (microprocessor)|clarksfield]] | * [[Clarksfield (microprocessor)|clarksfield]] | ||
+ | * [[Jasper Forest (microprocessor)|jasperforest]] | ||
+ | * [[Intel Atom|diamondville]] | ||
+ | * [[Intel Atom|silverthorne]] | ||
+ | * [[Intel Atom|pineview]] | ||
* [[Dunnington (microprocessor)|dunnington]] | * [[Dunnington (microprocessor)|dunnington]] | ||
* [[Harpertown (microprocessor)|harpertown]] | * [[Harpertown (microprocessor)|harpertown]] | ||
Line 52: | Line 77: | ||
* [[Sossaman (microprocessor)|sossaman]] | * [[Sossaman (microprocessor)|sossaman]] | ||
* [[Yonah (microprocessor)|yonah]] | * [[Yonah (microprocessor)|yonah]] | ||
− | * [[ | + | * [[Dothan (microprocessor)|dothan]] |
− | * [[ | + | * [[Banias (microprocessor)|banias]] |
− | * [[ | + | * [[Tillamook (microprocessor)|tillamook]] |
+ | * [[P5 (microprocessor)|p5]] | ||
Other arguments are | Other arguments are | ||
− | * model: The name of the processor | + | * {{para|anchor}}: An arbitrary HTML anchor that can be assigned to an entry |
− | * sspec1: up to | + | * {{para|model}}: The name of the processor |
− | * step1: up to | + | * {{para|sspec}} or {{para|sspec1}}…{{para|sspec8}}: up to 8 Intel sSpec numbers |
− | * freq: Core frequency, can often be determined by ''fsb'' and ''mult'' arguments, in MHz or GHz | + | ** {{para|step1}}…{{para|step8}}: up to 8 stepping names for the above sSpec numbers |
− | * uncore: Uncore frequency, in MHz or GHz | + | * {{para|freq}}: Core frequency, can often be determined by ''fsb'' and ''mult'' arguments, in MHz or GHz |
− | * turbo: Turbo frequencies | + | * {{para|uncore}}: Uncore frequency, in MHz or GHz |
− | * gfxfreq: clock frequency of the integrated graphics, if applicable | + | * {{para|turbo}}: Turbo frequencies , as increments in clock multiplier |
− | * l2: size of the Level 2 Cache, in KB or MB | + | * {{para|burst}}: Burst frequencies , in GHz |
− | * l3: size of the Level 3 Cache, in MB | + | * {{para|igp}}: Model of integrated graphics processor |
− | * iobus: Type and speed of I/O bus interface, may be expressed as one of | + | * {{para|gfxfreq}}: clock frequency of the integrated graphics, if applicable |
− | ** fsb: performance of Front- | + | * {{para|cores}}: number of processor cores |
− | ** ht: performance of Hypertransport in MT/s, if applicable | + | ** {{para|threads}}: number of processor threads |
− | ** qpi: performance of Quickpath interface in MT/s, if applicable | + | * {{para|l1}}: size of the Level 1 Cache, in KB |
− | ** dmi: set to 1 if Direct media interface is in use | + | * {{para|l2}}: size of the Level 2 Cache, in KB or MB |
− | * mult: clock multiplier of fsb or base frequency | + | * {{para|l3}}: size of the Level 3 Cache, in MB |
− | * mem: memory interface of integrated memory controller, may be expressed as | + | * {{para|iobus}}: Type and speed of I/O bus interface, may be expressed as one of |
− | ** memspeed: data rate of integrated memory controller | + | ** {{para|fsb}}: performance of Front-side bus in MT/s, if applicable |
− | * volt: core voltage range, usually given as | + | ** {{para|ht}}: performance of Hypertransport in MT/s, if applicable |
− | ** vmin: minimum voltage in volts | + | ** {{para|qpi}}: performance of Quickpath interface in MT/s, if applicable |
− | ** vmax: maximum voltage (optional) in volts | + | ** {{para|dmi}}: set to 1 if Direct media interface is in use |
− | * tdp: Thermal design power in watts | + | * {{para|mult}}: clock multiplier of fsb or base frequency |
− | * sock: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others | + | * {{para|mem}}: memory interface of integrated memory controller, may be expressed as |
− | * date: release date | + | ** {{para|memspeed}}: data rate of integrated memory controller |
− | * part1: part | + | * {{para|volt}}: core voltage range, usually given as |
− | * price: price in USD at the time of release | + | ** {{para|vmin}}: minimum voltage in volts |
+ | ** {{para|vmax}}: maximum voltage (optional) in volts | ||
+ | * {{para|tdp}} or {{para|tdp1}}…{{para|tdp8}}: Thermal design power in watts | ||
+ | * {{para|sdp}}: Scenario design power in watts | ||
+ | * {{para|sock}} or {{para|sock1}}…{{para|sock8}}: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others | ||
+ | * {{para|date}}: release date | ||
+ | * {{para|part}} or {{para|part1}}…{{para|part8}}: part numbers | ||
+ | * {{para|price}}: price in USD at the time of release | ||
A special argument is | A special argument is | ||
− | * links: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table | + | * {{para|links}}: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table |
+ | |||
+ | <includeonly>{{sandbox other|| | ||
+ | <!-- Template Categories; Interwiki links should be migrated to Wikidata sitelinks --> | ||
+ | }}</includeonly> |
Latest revision as of 21:43, 2 September 2020
![]() | This is a documentation subpage for Template:Cpulist. It contains usage information, categories and other content that is not part of the original template page. |
cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.
As a simple example,
{{cpulist|nehalem|head}} {{cpulist|nehalem|gainestown|model=Xeon E5502 |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1 |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}} {{cpulist|nehalem|end}}
results in a table like
Model number |
sSpec number |
Frequency | Turbo | Cores | L2 cache |
L3 cache |
I/O bus | Mult. | Memory | Voltage | TDP | Socket | Release date | Part number(s) |
Release price (USD) |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xeon E5502 |
|
1.87 GHz | N/A | 4 | 4 × 256 KiB | 4 MiB | 2 × 4.8 GT/s QPI | 14× | 3 × DDR3-800 | 0.75–1.35 V | 80 W
|
LGA 1366 | March 30, 2009 |
|
$188 |
Model number |
sSpec number |
Frequency | Turbo | Cores | L2 cache |
L3 cache |
I/O bus | Mult. | Memory | Voltage | TDP | Socket | Release date | Part number(s) |
Release price (USD) |
Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.
Here is the list of cpulist sub-templates:
Template arguments
The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are
- lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
- skylake For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
- silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
- haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
- bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- sandybridge: For lists of the previous Sandy Bridge processors, currently same format as bridge
- nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
- nehgfx: like nehalem, but for chips with integrated graphics capability
- atom: For lists of low-end Atom processors, currently same format as core
- atomx3: For lists of Atom processors
- atomgfx: For lists of Atom processors with integrated graphics
- core: For lists of Intel's previous generation of processors
- p6: For lists of Intel's p6 generation of processors
- p5: For lists of Intel's p5 generation of processors
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:
- head: A special argument, resulting in a table header
- tigerlake, willowcove
- icelake, sunnycove
- kabylake_x
- skylake, skylake_e
- baytrail
- haswell
- ivybridge
- sandybridge
- sandybridge_e
- gulftown
- gulftownup
- clarkdale
- arrandale
- beckton
- bloomfield
- gainestown
- lynnfield
- clarksfield
- jasperforest
- diamondville
- silverthorne
- pineview
- dunnington
- harpertown
- yorkfield
- wolfdale
- penryn, penrynulv
- tigerton
- clovertown
- kentsfield
- woodcrest
- conroe
- merom
- sossaman
- yonah
- dothan
- banias
- tillamook
- p5
Other arguments are
|anchor=
: An arbitrary HTML anchor that can be assigned to an entry|model=
: The name of the processor|sspec=
or|sspec1=
…|sspec8=
: up to 8 Intel sSpec numbers|step1=
…|step8=
: up to 8 stepping names for the above sSpec numbers
|freq=
: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz|uncore=
: Uncore frequency, in MHz or GHz|turbo=
: Turbo frequencies , as increments in clock multiplier|burst=
: Burst frequencies , in GHz|igp=
: Model of integrated graphics processor|gfxfreq=
: clock frequency of the integrated graphics, if applicable|cores=
: number of processor cores|threads=
: number of processor threads
|l1=
: size of the Level 1 Cache, in KB|l2=
: size of the Level 2 Cache, in KB or MB|l3=
: size of the Level 3 Cache, in MB|iobus=
: Type and speed of I/O bus interface, may be expressed as one of|fsb=
: performance of Front-side bus in MT/s, if applicable|ht=
: performance of Hypertransport in MT/s, if applicable|qpi=
: performance of Quickpath interface in MT/s, if applicable|dmi=
: set to 1 if Direct media interface is in use
|mult=
: clock multiplier of fsb or base frequency|mem=
: memory interface of integrated memory controller, may be expressed as|memspeed=
: data rate of integrated memory controller
|volt=
: core voltage range, usually given as|vmin=
: minimum voltage in volts|vmax=
: maximum voltage (optional) in volts
|tdp=
or|tdp1=
…|tdp8=
: Thermal design power in watts|sdp=
: Scenario design power in watts|sock=
or|sock1=
…|sock8=
: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others|date=
: release date|part=
or|part1=
…|part8=
: part numbers|price=
: price in USD at the time of release
A special argument is
|links=
: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table