Difference between revisions of "Template:Intel processors"
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| title = [[List of Intel microprocessors|Intel processors]] | | title = [[List of Intel microprocessors|Intel processors]] | ||
| state = {{{state<includeonly>|autocollapse</includeonly>}}} | | state = {{{state<includeonly>|autocollapse</includeonly>}}} | ||
| + | | border = {{{1|}}} <!-- Needed for Template:Intel --> | ||
| listclass = hlist | | listclass = hlist | ||
| Line 61: | Line 62: | ||
** [[Celeron#Prescott-256|D]] (2004) | ** [[Celeron#Prescott-256|D]] (2004) | ||
* [[Pentium]] | * [[Pentium]] | ||
| − | ** [[P5 (microarchitecture)|Original]] | + | ** [[P5 (microarchitecture)|Original P5]] |
** [[Pentium OverDrive|OverDrive]] | ** [[Pentium OverDrive|OverDrive]] | ||
** [[Pentium Pro|Pro]] | ** [[Pentium Pro|Pro]] | ||
| Line 70: | Line 71: | ||
** [[Pentium M|M]] | ** [[Pentium M|M]] | ||
** [[Pentium Dual-Core|Dual-Core]] | ** [[Pentium Dual-Core|Dual-Core]] | ||
| − | * [[Intel Core|Core]] | + | * some [[Intel Core|Core]] |
** [[Core Solo|Solo]] | ** [[Core Solo|Solo]] | ||
** [[Core Duo|Duo]] | ** [[Core Duo|Duo]] | ||
| + | * [[Tolapai]] | ||
| + | |||
| group6 = [[x86-64]] ([[64-bit computing|64-bit]]) | | group6 = [[x86-64]] ([[64-bit computing|64-bit]]) | ||
| Line 84: | Line 87: | ||
** [[Pentium D#Smithfield XE|Extreme Edition]] | ** [[Pentium D#Smithfield XE|Extreme Edition]] | ||
** [[Pentium Dual-Core|Dual-Core]] | ** [[Pentium Dual-Core|Dual-Core]] | ||
| − | * [[Intel Core|Core]] | + | * some [[Intel Core|Core]] |
** [[Intel Core 2|2]] | ** [[Intel Core 2|2]] | ||
| − | ** [[Sandy Bridge|i7 | + | ** [[Sandy Bridge|some i7]] |
| group7 = Other | | group7 = Other | ||
| list7 = | | list7 = | ||
| − | ;[[Complex instruction set | + | ;[[Complex instruction set computer|CISC]] |
:[[Intel iAPX 432|iAPX 432]] | :[[Intel iAPX 432|iAPX 432]] | ||
| − | ;[[Reduced instruction set | + | ;[[Explicitly parallel instruction computing|EPIC]] |
| + | :[[Itanium]] | ||
| + | ;[[Reduced instruction set computer|RISC]] | ||
:[[Intel i860|i860]] | :[[Intel i860|i860]] | ||
:[[Intel i960|i960]] | :[[Intel i960|i960]] | ||
:[[StrongARM]] | :[[StrongARM]] | ||
:[[XScale]] | :[[XScale]] | ||
| + | |||
}} | }} | ||
| Line 102: | Line 108: | ||
| list2 = {{Navbox|child | | list2 = {{Navbox|child | ||
| title = Current | | title = Current | ||
| − | | state = {{{state<includeonly>| | + | | state = {{{state<includeonly>|uncollapse</includeonly>}}} |
| groupstyle = width:12em | | groupstyle = width:12em | ||
| liststyle = width:auto | | liststyle = width:auto | ||
| Line 108: | Line 114: | ||
| group1 = [[IA-32]] ([[32-bit]]) | | group1 = [[IA-32]] ([[32-bit]]) | ||
| list1 = | | list1 = | ||
| − | |||
* [[Intel Atom|Atom]] | * [[Intel Atom|Atom]] | ||
** [[List of Intel Atom microprocessors#CE SoCs|CE]] | ** [[List of Intel Atom microprocessors#CE SoCs|CE]] | ||
| Line 122: | Line 127: | ||
* [[Pentium]] | * [[Pentium]] | ||
* [[Intel Core|Core]] | * [[Intel Core|Core]] | ||
| − | ** | + | ** i3 |
| − | ** | + | ** i5 |
| − | ** | + | ** i7 |
| + | ** i9 | ||
** [[Intel Core#Core M|M]] | ** [[Intel Core#Core M|M]] | ||
* [[Xeon]] | * [[Xeon]] | ||
| − | ** | + | ** E3 |
| − | ** | + | ** E5 |
| − | ** [[Xeon| | + | ** E7 |
| − | ** [[ | + | ** [[Xeon D|D]] |
| − | + | ** [[Xeon Phi|Phi]] | |
| − | |||
| − | |||
| − | |||
| − | |||
}} | }} | ||
| Line 145: | Line 147: | ||
| list1 = | | list1 = | ||
| − | |||
* [[List of Intel Celeron microprocessors|Celeron]] | * [[List of Intel Celeron microprocessors|Celeron]] | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
* [[List of Intel Pentium microprocessors|Pentium]] | * [[List of Intel Pentium microprocessors|Pentium]] | ||
** [[List of Intel Pentium Pro microprocessors|Pro]] | ** [[List of Intel Pentium Pro microprocessors|Pro]] | ||
| Line 161: | Line 155: | ||
** [[List of Intel Pentium D microprocessors|D]] | ** [[List of Intel Pentium D microprocessors|D]] | ||
** [[List of Intel Pentium M microprocessors|M]] | ** [[List of Intel Pentium M microprocessors|M]] | ||
| + | * [[Intel Core|Core]] | ||
| + | ** [[List of Intel Core microprocessors|Core]] | ||
| + | ** [[List of Intel Core 2 microprocessors|2]] | ||
| + | ** [[List of Intel Core i3 microprocessors|i3]] | ||
| + | ** [[List of Intel Core i5 microprocessors|i5]] | ||
| + | ** [[List of Intel Core i7 microprocessors|i7]] | ||
| + | ** [[List of Intel Core i9 microprocessors|i9]] | ||
| + | ** [[List of Intel Core M microprocessors|M]] | ||
| + | * [[List of Intel Atom microprocessors|Atom]] | ||
* [[List of Intel Xeon microprocessors|Xeon]] | * [[List of Intel Xeon microprocessors|Xeon]] | ||
| − | + | * [[List of Intel Itanium microprocessors|Itanium]] | |
}} | }} | ||
| Line 172: | Line 175: | ||
| list1 = | | list1 = | ||
| + | * [[Tick–tock model]] | ||
* [[List of Intel chipsets|Chipsets]] | * [[List of Intel chipsets|Chipsets]] | ||
| + | * [[List of Intel graphics processing units|GPUs]] | ||
| + | * [[Intel GMA|GMA]] | ||
| + | * [[Intel HD and Iris Graphics|HD and Iris Graphics]] | ||
* [[Platform Controller Hub|PCHs]] | * [[Platform Controller Hub|PCHs]] | ||
* [[System Controller Hub|SCHs]] | * [[System Controller Hub|SCHs]] | ||
* [[I/O Controller Hub|ICHs]] | * [[I/O Controller Hub|ICHs]] | ||
* [[PCI IDE ISA Xcelerator|PIIXs]] | * [[PCI IDE ISA Xcelerator|PIIXs]] | ||
| − | * [[ | + | * [[Stratix]] |
* [[List of Intel codenames|Codenames]] | * [[List of Intel codenames|Codenames]] | ||
| − | |||
| − | |||
| − | |||
}} | }} | ||
| list6 = {{Navbox|child | | list6 = {{Navbox|child | ||
| title = [[List of Intel CPU microarchitectures|Microarchitectures]] | | title = [[List of Intel CPU microarchitectures|Microarchitectures]] | ||
| + | | below = | ||
| + | | belowstyle = | ||
| + | | state = {{{state<includeonly>|uncollapse</includeonly>}}} | ||
| + | | groupstyle = <!-- width:12em --> | ||
| + | | liststyle = width:auto | ||
| − | | | + | | group1 = [[x86]] |
| − | | | + | | list1 = {{Navbox|child |
| − | |||
| group1 = [[P5 (microarchitecture)|P5]] | | group1 = [[P5 (microarchitecture)|P5]] | ||
| Line 203: | Line 211: | ||
:[[Tillamook (microprocessor)|Tillamook]] | :[[Tillamook (microprocessor)|Tillamook]] | ||
| − | | group2 = [[P6 (microarchitecture)|P6]] | + | | group2 = [[P6 (microarchitecture)|P6]], [[P6 (microarchitecture)#P6 Variant Pentium M|Pentium M]],<br />[[P6 (microarchitecture)#P6 Variant Enhanced Pentium M|Enhanced Pentium M]] |
| list2 = | | list2 = | ||
| Line 255: | Line 263: | ||
:[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]] | :[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]] | ||
:[[Xeon#"Paxville DP"|Paxville]] | :[[Xeon#"Paxville DP"|Paxville]] | ||
| − | ;65 nm | + | ;[[65 nm process|65 nm]] |
:[[Pentium 4#Cedar Mill|Cedar Mill]] | :[[Pentium 4#Cedar Mill|Cedar Mill]] | ||
:[[Pentium D#Presler|Presler]] | :[[Pentium D#Presler|Presler]] | ||
| Line 261: | Line 269: | ||
:[[Xeon#7100-series "Tulsa"|Tulsa]] | :[[Xeon#7100-series "Tulsa"|Tulsa]] | ||
| − | | group4 = [[Intel Core (microarchitecture)|Core | + | | group4 = [[Intel Core (microarchitecture)|Core]] |
| list4 = | | list4 = | ||
;65 nm | ;65 nm | ||
| Line 273: | Line 281: | ||
:[[Clovertown (microprocessor)|Clovertown]] | :[[Clovertown (microprocessor)|Clovertown]] | ||
:[[Tigerton (microprocessor)|Tigerton]] | :[[Tigerton (microprocessor)|Tigerton]] | ||
| + | |||
;[[45 nanometer|45 nm]] | ;[[45 nanometer|45 nm]] | ||
:[[Penryn (microprocessor)|Penryn]] | :[[Penryn (microprocessor)|Penryn]] | ||
| Line 282: | Line 291: | ||
:[[Dunnington (microprocessor)|Dunnington]] | :[[Dunnington (microprocessor)|Dunnington]] | ||
| − | | group5 = [[ | + | | group5 = [[Nehalem (microarchitecture)|Nehalem]] |
| list5 = | | list5 = | ||
;45 nm | ;45 nm | ||
| − | :[[ | + | :[[Auburndale (microprocessor) |Auburndale]] |
| − | :[[ | + | :[[Xeon#6500/7500-series "Beckton"|Beckton (Nehalem-EX)]] |
| − | + | :[[Bloomfield (microprocessor)|Bloomfield]] | |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | :[[ | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
:[[Clarksfield (microprocessor)|Clarksfield]] | :[[Clarksfield (microprocessor)|Clarksfield]] | ||
| + | :[[Xeon#5500-series "Gainestown"|Gainestown (Nehalem-EP)]] | ||
| + | :[[Havendale (microprocessor)|Havendale]] | ||
| + | :[[Xeon#C3500/C5500-series "Jasper Forest"|Jasper Forest]] | ||
:[[Lynnfield (microprocessor)|Lynnfield]] | :[[Lynnfield (microprocessor)|Lynnfield]] | ||
| − | + | ||
| − | + | ;[[32 nanometer|32 nm]] | |
| − | |||
| − | |||
| − | |||
:[[Arrandale]] | :[[Arrandale]] | ||
:[[Clarkdale (microprocessor)|Clarkdale]] | :[[Clarkdale (microprocessor)|Clarkdale]] | ||
| Line 315: | Line 309: | ||
:[[Nehalem (microarchitecture)#Westmere|Westmere-EX]] | :[[Nehalem (microarchitecture)#Westmere|Westmere-EX]] | ||
| − | | group7 = [[Sandy Bridge | + | | group7 = [[Sandy Bridge|Sandy Bridge]] |
| list7 = | | list7 = | ||
;32 nm | ;32 nm | ||
| Line 321: | Line 315: | ||
:[[Sandy Bridge-E]] | :[[Sandy Bridge-E]] | ||
:Gladden | :Gladden | ||
| + | |||
;[[22 nanometer|22 nm]] | ;[[22 nanometer|22 nm]] | ||
:[[Ivy Bridge (microarchitecture)|Ivy Bridge]] | :[[Ivy Bridge (microarchitecture)|Ivy Bridge]] | ||
| Line 326: | Line 321: | ||
:Ivy Bridge-EX | :Ivy Bridge-EX | ||
| − | | group8 = [[Haswell (microarchitecture)|Haswell | + | | group8 = [[Haswell (microarchitecture)|Haswell]] |
| list8 = | | list8 = | ||
;22 nm | ;22 nm | ||
:[[Haswell (microarchitecture)|Haswell]] | :[[Haswell (microarchitecture)|Haswell]] | ||
| + | |||
;[[14 nanometer|14 nm]] | ;[[14 nanometer|14 nm]] | ||
:[[Broadwell (microarchitecture)|Broadwell]] | :[[Broadwell (microarchitecture)|Broadwell]] | ||
| − | + | | group10 = [[Skylake (microarchitecture)|Skylake]] | |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | | group10 = [[Skylake (microarchitecture)|Skylake | ||
| list10 = | | list10 = | ||
;14 nm | ;14 nm | ||
:[[Skylake (microarchitecture)|Skylake]] | :[[Skylake (microarchitecture)|Skylake]] | ||
| − | :[[Kaby Lake]] | + | :[[Kaby Lake]] ([[Kaby Lake#Amber Lake|Amber Lake]]) |
| − | + | :[[Coffee Lake]] ([[Whiskey Lake (microprocessor)|Whiskey Lake]]) | |
| − | :[[ | + | :[[Cascade Lake (microarchitecture)|Cascade Lake]] |
| + | :[[Comet Lake (microprocessor)|Comet Lake]] | ||
| + | :[[Cooper Lake (microarchitecture)|Cooper Lake]] | ||
| − | | group11 = [[ | + | | group11 = [[Palm Cove (microarchitecture)|Palm Cove]] |
| list11 = | | list11 = | ||
| + | ;10 nm | ||
| + | :[[Cannon Lake (microarchitecture)|Cannon Lake]] | ||
| + | |||
| + | | group12 = [[Sunny Cove]] | ||
| + | | list12 = | ||
| + | |||
| + | ;10 nm | ||
| + | :[[Ice Lake (microprocessor)|Ice Lake]] | ||
| + | |||
| + | |||
| + | | group13 = [[Willow Cove]] | ||
| + | | list13 = | ||
| + | |||
;14 nm | ;14 nm | ||
| − | :[[ | + | :[[Rocket Lake]] |
| + | |||
| + | ;10 nm | ||
| + | :[[Tiger Lake (microarchitecture)|Tiger Lake]] | ||
| + | :[[Sapphire Rapids]] | ||
| + | |||
| + | | group14 = [[Golden Cove]] | ||
| + | | list14 = | ||
| − | |||
| − | |||
;10 nm | ;10 nm | ||
| − | :[[ | + | :[[Alder Lake (microprocessor)|Alder Lake]] |
| − | :[[ | + | |
| + | ;[[7 nm process|7 nm]] | ||
| + | :[[Granite Rapids]] | ||
| + | |||
| + | | group15 = [[Redwood Cove]] | ||
| + | | list15 = | ||
| + | |||
| + | ;7 nm | ||
| + | :[[Meteor Lake (microprocessor)|Meteor Lake]] | ||
}} | }} | ||
| + | | group2 = [[Intel Atom|Atom]] | ||
| + | | list2 = {{Navbox|child | ||
| + | |||
| + | | group1 = [[Bonnell (microarchitecture)|Bonnell<br>Saltwell]] | ||
| + | | list1 = | ||
| + | ;45 nm | ||
| + | :[[Silverthorne (microprocessor)|Silverthorne]] | ||
| + | :[[Diamondville (microprocessor)|Diamondville]] | ||
| + | :[[Pineview (microprocessor)|Pineview]] | ||
| + | :[[Lincroft (microprocessor)|Lincroft]] | ||
| + | :[[Tunnel Creek (microprocessor)|Tunnel Creek]] | ||
| + | :[[Stellarton (microprocessor)|Stellarton]] | ||
| + | :[[Sodaville (SoC)|Sodaville]] | ||
| + | :[[Groveland (SoC)|Groveland]] | ||
| + | |||
| + | ;32 nm | ||
| + | :[[Cedarview (microprocessor)|Cedarview]] | ||
| + | :[[Penwell (SoC)|Penwell]] | ||
| + | :[[Cloverview (SoC)|Cloverview]] | ||
| + | :[[Berryville (SoC)|Berryville]] | ||
| + | :[[Centerton (SoC)|Centerton]] | ||
| + | |||
| + | | group2 = [[Silvermont|Silvermont<br>Airmont]] | ||
| + | | list2 = | ||
| + | ;22 nm | ||
| + | :[[List of Intel CPU microarchitectures#Atom Lines|Valleyview]] | ||
| + | :[[List of Intel CPU microarchitectures#Atom Lines|Tangier]] | ||
| + | :[[List of Intel CPU microarchitectures#Atom Lines|Anniedale]] | ||
| + | |||
| + | ;14 nm | ||
| + | :[[List of Intel CPU microarchitectures#Atom Lines|Cherryview]] | ||
| + | | group3 = [[Goldmont]] | ||
| + | | list3 = | ||
| + | ;14 nm | ||
| + | :[[Goldmont]] | ||
| + | :[[Goldmont Plus]] | ||
| + | | group4 = [[Tremont (microarchitecture)|Tremont]] | ||
| + | | list4 = | ||
| + | ;10 nm | ||
| + | :[[Tremont (microarchitecture)|Tremont]] | ||
| + | :[[Gracemont (microarchitecture)|Gracemont]] | ||
| + | }} | ||
| + | }} | ||
<!--*[[Larrabee (microarchitecture)|Larrabee]]--> | <!--*[[Larrabee (microarchitecture)|Larrabee]]--> | ||
| − | }}{{main other| {{# | + | }}{{main other| {{#switch:<includeonly>discontinued</includeonly>|{{{1|}}}|{{{2|}}}|{{{3|}}}|{{{4|}}}|{{{5|}}}|{{{6|}}}|{{{7|}}}|{{{8|}}}|{{{9|}}}=[[Category:Intel microprocessors]]|#default=[[Category:Intel x86 microprocessors]]}} |
}}<noinclude>{{Documentation | content = | }}<noinclude>{{Documentation | content = | ||
| Line 379: | Line 437: | ||
[[Category:Computer hardware navigational boxes]] | [[Category:Computer hardware navigational boxes]] | ||
| − | [[Category:Intel | + | [[Category:Intel|µ]] |
}}</noinclude> | }}</noinclude> | ||
Latest revision as of 18:35, 27 December 2020
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See also
- {{Cpulist}}
- {{Intel technology}}
- {{Intel software}}
- {{Intel processor roadmap}}
- {{Intel CPU sockets}}
- {{Intel controllers}}
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