Difference between revisions of "Template:Intel processors"

From blackwiki
Jump to navigation Jump to search
imported>W like wiki
(first core, than atom)
imported>Piranha249
m
 
(20 intermediate revisions by 16 users not shown)
Line 3: Line 3:
 
  | title = [[List of Intel microprocessors|Intel processors]]
 
  | title = [[List of Intel microprocessors|Intel processors]]
 
  | state = {{{state<includeonly>|autocollapse</includeonly>}}}
 
  | state = {{{state<includeonly>|autocollapse</includeonly>}}}
 +
| border = {{{1|}}} <!-- Needed for Template:Intel -->
 
  | listclass = hlist
 
  | listclass = hlist
  
Line 94: Line 95:
 
;[[Complex instruction set computer|CISC]]
 
;[[Complex instruction set computer|CISC]]
 
:[[Intel iAPX 432|iAPX 432]]
 
:[[Intel iAPX 432|iAPX 432]]
 +
;[[Explicitly parallel instruction computing|EPIC]]
 +
:[[Itanium]]
 
;[[Reduced instruction set computer|RISC]]
 
;[[Reduced instruction set computer|RISC]]
 
:[[Intel i860|i860]]
 
:[[Intel i860|i860]]
Line 99: Line 102:
 
:[[StrongARM]]
 
:[[StrongARM]]
 
:[[XScale]]
 
:[[XScale]]
 +
  
 
  }}
 
  }}
Line 134: Line 138:
 
** [[Xeon D|D]]
 
** [[Xeon D|D]]
 
** [[Xeon Phi|Phi]]
 
** [[Xeon Phi|Phi]]
 
  | group3 = [[Explicitly parallel instruction computing|EPIC]]
 
  | list3 =
 
* [[Itanium#Itanium 2: 2002–2010|Itanium]]
 
 
 
  }}
 
  }}
  
Line 191: Line 190:
 
  | list6 = {{Navbox|child
 
  | list6 = {{Navbox|child
 
   | title = [[List of Intel CPU microarchitectures|Microarchitectures]]
 
   | title = [[List of Intel CPU microarchitectures|Microarchitectures]]
   | below = <sup>*</sup> {{=}} ''[[Intel Atom]]''
+
   | below =  
   | belowstyle = text-align: left;
+
   | belowstyle =  
 
   | state = {{{state<includeonly>|uncollapse</includeonly>}}}
 
   | state = {{{state<includeonly>|uncollapse</includeonly>}}}
   | groupstyle = width:12em
+
   | groupstyle = <!-- width:12em -->
 
   | liststyle = width:auto
 
   | liststyle = width:auto
 +
 +
  | group1 = [[x86]]
 +
  | list1  = {{Navbox|child
  
 
   | group1 = [[P5 (microarchitecture)|P5]]
 
   | group1 = [[P5 (microarchitecture)|P5]]
Line 261: Line 263:
 
:[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]]
 
:[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]]
 
:[[Xeon#"Paxville DP"|Paxville]]
 
:[[Xeon#"Paxville DP"|Paxville]]
;65&nbsp;nm
+
;[[65 nm process|65&nbsp;nm]]
 
:[[Pentium 4#Cedar Mill|Cedar Mill]]
 
:[[Pentium 4#Cedar Mill|Cedar Mill]]
 
:[[Pentium D#Presler|Presler]]
 
:[[Pentium D#Presler|Presler]]
Line 267: Line 269:
 
:[[Xeon#7100-series "Tulsa"|Tulsa]]
 
:[[Xeon#7100-series "Tulsa"|Tulsa]]
  
   | group4 = [[Intel Core (microarchitecture)|Core]], [[Penryn (microarchitecture)|Penryn]]
+
   | group4 = [[Intel Core (microarchitecture)|Core]]
 
   | list4 =
 
   | list4 =
 
;65&nbsp;nm
 
;65&nbsp;nm
Line 279: Line 281:
 
:[[Clovertown (microprocessor)|Clovertown]]
 
:[[Clovertown (microprocessor)|Clovertown]]
 
:[[Tigerton (microprocessor)|Tigerton]]
 
:[[Tigerton (microprocessor)|Tigerton]]
 +
 
;[[45 nanometer|45&nbsp;nm]]
 
;[[45 nanometer|45&nbsp;nm]]
 
:[[Penryn (microprocessor)|Penryn]]
 
:[[Penryn (microprocessor)|Penryn]]
Line 288: Line 291:
 
:[[Dunnington (microprocessor)|Dunnington]]
 
:[[Dunnington (microprocessor)|Dunnington]]
  
   | group5 = [[Nehalem (microarchitecture)|Nehalem]], [[Westmere (microarchitecture)|Westmere]]
+
   | group5 = [[Nehalem (microarchitecture)|Nehalem]]
 
   | list5 =
 
   | list5 =
 
;45&nbsp;nm
 
;45&nbsp;nm
Line 299: Line 302:
 
:[[Xeon#C3500/C5500-series "Jasper Forest"|Jasper Forest]]
 
:[[Xeon#C3500/C5500-series "Jasper Forest"|Jasper Forest]]
 
:[[Lynnfield (microprocessor)|Lynnfield]]
 
:[[Lynnfield (microprocessor)|Lynnfield]]
;32&nbsp;nm
+
 
 +
;[[32 nanometer|32&nbsp;nm]]
 
:[[Arrandale]]
 
:[[Arrandale]]
 
:[[Clarkdale (microprocessor)|Clarkdale]]
 
:[[Clarkdale (microprocessor)|Clarkdale]]
Line 305: Line 309:
 
:[[Nehalem (microarchitecture)#Westmere|Westmere-EX]]
 
:[[Nehalem (microarchitecture)#Westmere|Westmere-EX]]
  
  | group6 = ''[[Bonnell (microarchitecture)|Bonnell, Saltwell]]'' <sup>*</sup>
+
   | group7 = [[Sandy Bridge|Sandy Bridge]]
  | list6 =
 
;45&nbsp;nm
 
:[[Silverthorne (microprocessor)|Silverthorne]]
 
:[[Diamondville (microprocessor)|Diamondville]]
 
:[[Pineview (microprocessor)|Pineview]]
 
:[[Lincroft (microprocessor)|Lincroft]]
 
:[[Tunnel Creek (microprocessor)|Tunnel Creek]]
 
:[[Stellarton (microprocessor)|Stellarton]]
 
:[[Sodaville (SoC)|Sodaville]]
 
:[[Groveland (SoC)|Groveland]]
 
;[[32 nanometer|32&nbsp;nm]]
 
:[[Cedarview (microprocessor)|Cedarview]]
 
:[[Penwell (SoC)|Penwell]]
 
:[[Cloverview (SoC)|Cloverview]]
 
:[[Berryville (SoC)|Berryville]]
 
:[[Centerton (SoC)|Centerton]]
 
 
 
   | group7 = [[Sandy Bridge]], [[Ivy Bridge (microarchitecture)|Ivy Bridge]]
 
 
   | list7 =
 
   | list7 =
 
;32&nbsp;nm
 
;32&nbsp;nm
Line 329: Line 315:
 
:[[Sandy Bridge-E]]
 
:[[Sandy Bridge-E]]
 
:Gladden
 
:Gladden
 +
 
;[[22 nanometer|22&nbsp;nm]]
 
;[[22 nanometer|22&nbsp;nm]]
 
:[[Ivy Bridge (microarchitecture)|Ivy Bridge]]
 
:[[Ivy Bridge (microarchitecture)|Ivy Bridge]]
Line 334: Line 321:
 
:Ivy Bridge-EX
 
:Ivy Bridge-EX
  
   | group8 = [[Haswell (microarchitecture)|Haswell]], [[Broadwell (microarchitecture)|Broadwell]]
+
   | group8 = [[Haswell (microarchitecture)|Haswell]]
 
   | list8 =
 
   | list8 =
 
;22&nbsp;nm
 
;22&nbsp;nm
 
:[[Haswell (microarchitecture)|Haswell]]
 
:[[Haswell (microarchitecture)|Haswell]]
 +
 
;[[14 nanometer|14&nbsp;nm]]
 
;[[14 nanometer|14&nbsp;nm]]
 
:[[Broadwell (microarchitecture)|Broadwell]]
 
:[[Broadwell (microarchitecture)|Broadwell]]
  
   | group9 = ''[[Silvermont|Silvermont, Airmont]]'' <sup>*</sup>
+
   | group10 = [[Skylake (microarchitecture)|Skylake]]
  | list9 =
 
;22&nbsp;nm
 
:[[List of Intel CPU microarchitectures#Atom Lines|Valleyview]]
 
:[[List of Intel CPU microarchitectures#Atom Lines|Tangier]]
 
:[[List of Intel CPU microarchitectures#Atom Lines|Anniedale]]
 
;14&nbsp;nm
 
:[[List of Intel CPU microarchitectures#Atom Lines|Cherryview]]
 
 
 
  | group10 = Skylake
 
 
   | list10 =  
 
   | list10 =  
 
;14&nbsp;nm
 
;14&nbsp;nm
 
:[[Skylake (microarchitecture)|Skylake]]
 
:[[Skylake (microarchitecture)|Skylake]]
 
:[[Kaby Lake]] ([[Kaby Lake#Amber Lake|Amber Lake]])
 
:[[Kaby Lake]] ([[Kaby Lake#Amber Lake|Amber Lake]])
:[[Coffee Lake]]
+
:[[Coffee Lake]] ([[Whiskey Lake (microprocessor)|Whiskey Lake]])
:[[Whiskey Lake (microarchitecture)|Whiskey Lake]]
 
 
:[[Cascade Lake (microarchitecture)|Cascade Lake]]
 
:[[Cascade Lake (microarchitecture)|Cascade Lake]]
:[[Comet Lake]]
+
:[[Comet Lake (microprocessor)|Comet Lake]]
;[[10 nanometer|10&nbsp;nm]]
+
:[[Cooper Lake (microarchitecture)|Cooper Lake]]
:[[Cannon Lake (microarchitecture)|Cannon Lake]]
 
  
   | group11 = ''Goldmont'' <sup>*</sup>
+
   | group11 = [[Palm Cove (microarchitecture)|Palm Cove]]
 
   | list11 =
 
   | list11 =
;14&nbsp;nm
+
;10&nbsp;nm
:[[Goldmont]]
+
:[[Cannon Lake (microarchitecture)|Cannon Lake]]  
:[[Goldmont Plus]]
 
  
   | group12 = Sunny Cove
+
   | group12 = [[Sunny Cove]]
 
   | list12 =  
 
   | list12 =  
 +
 
;10&nbsp;nm
 
;10&nbsp;nm
 
:[[Ice Lake (microprocessor)|Ice Lake]]
 
:[[Ice Lake (microprocessor)|Ice Lake]]
  
   | group13 = ''Future''
+
 
   | list13 =  
+
   | group13 = [[Willow Cove]]
 +
   | list13 =  
 +
 
 +
;14&nbsp;nm
 +
:[[Rocket Lake]]
 +
 
 
;10&nbsp;nm
 
;10&nbsp;nm
 
:[[Tiger Lake (microarchitecture)|Tiger Lake]]
 
:[[Tiger Lake (microarchitecture)|Tiger Lake]]
;[[7 nanometer|7&nbsp;nm]] or 10&nbsp;nm
 
 
:[[Sapphire Rapids]]
 
:[[Sapphire Rapids]]
:[[Intel Xe]] (GPGPU)
+
 
 +
  | group14 = [[Golden Cove]]
 +
  | list14 =
 +
 
 +
;10&nbsp;nm
 +
:[[Alder Lake (microprocessor)|Alder Lake]]
 +
 
 +
;[[7 nm process|7&nbsp;nm]]
 +
:[[Granite Rapids]]
 +
 
 +
  | group15 = [[Redwood Cove]]
 +
  | list15 =
 +
 
 +
;7&nbsp;nm
 +
:[[Meteor Lake (microprocessor)|Meteor Lake]]
 +
 
 
  }}
 
  }}
 +
  | group2 = [[Intel Atom|Atom]]
 +
  | list2  = {{Navbox|child
 +
 
 +
  | group1 = [[Bonnell (microarchitecture)|Bonnell<br>Saltwell]]
 +
  | list1 =
 +
;45&nbsp;nm
 +
:[[Silverthorne (microprocessor)|Silverthorne]]
 +
:[[Diamondville (microprocessor)|Diamondville]]
 +
:[[Pineview (microprocessor)|Pineview]]
 +
:[[Lincroft (microprocessor)|Lincroft]]
 +
:[[Tunnel Creek (microprocessor)|Tunnel Creek]]
 +
:[[Stellarton (microprocessor)|Stellarton]]
 +
:[[Sodaville (SoC)|Sodaville]]
 +
:[[Groveland (SoC)|Groveland]]
  
 +
;32&nbsp;nm
 +
:[[Cedarview (microprocessor)|Cedarview]]
 +
:[[Penwell (SoC)|Penwell]]
 +
:[[Cloverview (SoC)|Cloverview]]
 +
:[[Berryville (SoC)|Berryville]]
 +
:[[Centerton (SoC)|Centerton]]
 +
 +
  | group2 = [[Silvermont|Silvermont<br>Airmont]]
 +
  | list2 =
 +
;22&nbsp;nm
 +
:[[List of Intel CPU microarchitectures#Atom Lines|Valleyview]]
 +
:[[List of Intel CPU microarchitectures#Atom Lines|Tangier]]
 +
:[[List of Intel CPU microarchitectures#Atom Lines|Anniedale]]
 +
 +
;14&nbsp;nm
 +
:[[List of Intel CPU microarchitectures#Atom Lines|Cherryview]]
 +
 +
  | group3 = [[Goldmont]]
 +
  | list3 =
 +
;14&nbsp;nm
 +
:[[Goldmont]]
 +
:[[Goldmont Plus]]
 +
  | group4 = [[Tremont (microarchitecture)|Tremont]]
 +
  | list4 =
 +
;10&nbsp;nm
 +
:[[Tremont (microarchitecture)|Tremont]]
 +
:[[Gracemont (microarchitecture)|Gracemont]]
 +
}}
 +
}}
 
<!--*[[Larrabee (microarchitecture)|Larrabee]]-->
 
<!--*[[Larrabee (microarchitecture)|Larrabee]]-->
  

Latest revision as of 18:35, 27 December 2020

Template documentation

Initial visibility: currently defaults to autocollapse

To set this template's initial visibility, the |state= parameter may be used:

  • |state=collapsed: {{Intel processors|state=collapsed}} to show the template collapsed, i.e., hidden apart from its title bar
  • |state=expanded: {{Intel processors|state=expanded}} to show the template expanded, i.e., fully visible
  • |state=autocollapse: {{Intel processors|state=autocollapse}}
    • shows the template collapsed to the title bar if there is a {{navbar}}, a {{sidebar}}, or some other table on the page with the collapsible attribute
    • shows the template in its expanded state if there are no other collapsible items on the page

If the |state= parameter in the template on this page is not set, the template's initial visibility is taken from the |default= parameter in the Collapsible option template. For the template on this page, that currently evaluates to autocollapse.

See also