Difference between revisions of "Template:Intel processors"

From blackwiki
Jump to navigation Jump to search
imported>Piranha249
m
 
(13 intermediate revisions by 11 users not shown)
Line 3: Line 3:
 
  | title = [[List of Intel microprocessors|Intel processors]]
 
  | title = [[List of Intel microprocessors|Intel processors]]
 
  | state = {{{state<includeonly>|autocollapse</includeonly>}}}
 
  | state = {{{state<includeonly>|autocollapse</includeonly>}}}
 +
| border = {{{1|}}} <!-- Needed for Template:Intel -->
 
  | listclass = hlist
 
  | listclass = hlist
  
Line 94: Line 95:
 
;[[Complex instruction set computer|CISC]]
 
;[[Complex instruction set computer|CISC]]
 
:[[Intel iAPX 432|iAPX 432]]
 
:[[Intel iAPX 432|iAPX 432]]
 +
;[[Explicitly parallel instruction computing|EPIC]]
 
:[[Itanium]]
 
:[[Itanium]]
 
;[[Reduced instruction set computer|RISC]]
 
;[[Reduced instruction set computer|RISC]]
Line 261: Line 263:
 
:[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]]
 
:[[Xeon#Xeon (DP) & Xeon MP (64-bit)|Potomac]]
 
:[[Xeon#"Paxville DP"|Paxville]]
 
:[[Xeon#"Paxville DP"|Paxville]]
;65&nbsp;nm
+
;[[65 nm process|65&nbsp;nm]]
 
:[[Pentium 4#Cedar Mill|Cedar Mill]]
 
:[[Pentium 4#Cedar Mill|Cedar Mill]]
 
:[[Pentium D#Presler|Presler]]
 
:[[Pentium D#Presler|Presler]]
Line 327: Line 329:
 
:[[Broadwell (microarchitecture)|Broadwell]]
 
:[[Broadwell (microarchitecture)|Broadwell]]
  
   | group10 = Skylake
+
   | group10 = [[Skylake (microarchitecture)|Skylake]]
 
   | list10 =  
 
   | list10 =  
 
;14&nbsp;nm
 
;14&nbsp;nm
 
:[[Skylake (microarchitecture)|Skylake]]
 
:[[Skylake (microarchitecture)|Skylake]]
:[[Kaby Lake]] ([[Kaby Lake#Amber Lake|Amber Lake]] [[Whiskey Lake (microarchitecture)|Whiskey Lake]])
+
:[[Kaby Lake]] ([[Kaby Lake#Amber Lake|Amber Lake]])
:[[Coffee Lake]]
+
:[[Coffee Lake]] ([[Whiskey Lake (microprocessor)|Whiskey Lake]])
 
:[[Cascade Lake (microarchitecture)|Cascade Lake]]
 
:[[Cascade Lake (microarchitecture)|Cascade Lake]]
:[[Comet Lake]]
+
:[[Comet Lake (microprocessor)|Comet Lake]]
 +
:[[Cooper Lake (microarchitecture)|Cooper Lake]]
  
   | group11 = Palm Cove
+
   | group11 = [[Palm Cove (microarchitecture)|Palm Cove]]
 
   | list11 =
 
   | list11 =
 
;10&nbsp;nm
 
;10&nbsp;nm
 
:[[Cannon Lake (microarchitecture)|Cannon Lake]]   
 
:[[Cannon Lake (microarchitecture)|Cannon Lake]]   
  
   | group12 = Sunny Cove
+
   | group12 = [[Sunny Cove]]
 
   | list12 =  
 
   | list12 =  
 
;14&nbsp;nm
 
:[[Cooper Lake (microarchitecture)|Cooper Lake]]
 
  
 
;10&nbsp;nm
 
;10&nbsp;nm
Line 351: Line 351:
  
  
   | group13 = Willow Cove
+
   | group13 = [[Willow Cove]]
 
   | list13 =   
 
   | list13 =   
 +
 +
;14&nbsp;nm
 +
:[[Rocket Lake]]
 +
 
;10&nbsp;nm
 
;10&nbsp;nm
 
:[[Tiger Lake (microarchitecture)|Tiger Lake]]
 
:[[Tiger Lake (microarchitecture)|Tiger Lake]]
 +
:[[Sapphire Rapids]]
  
   | group14 = ''Future''
+
   | group14 = [[Golden Cove]]
 
   | list14 =  
 
   | list14 =  
;[[7 nanometer|7&nbsp;nm]] or 10&nbsp;nm
+
 
:[[Sapphire Rapids]]
+
;10&nbsp;nm
:[[Intel Xe]] (GPGPU)
+
:[[Alder Lake (microprocessor)|Alder Lake]]
 +
 
 +
;[[7 nm process|7&nbsp;nm]]
 +
:[[Granite Rapids]]
 +
 
 +
  | group15 = [[Redwood Cove]]
 +
  | list15 =
 +
 
 +
;7&nbsp;nm
 +
:[[Meteor Lake (microprocessor)|Meteor Lake]]
 +
 
 
  }}
 
  }}
 
   | group2 = [[Intel Atom|Atom]]
 
   | group2 = [[Intel Atom|Atom]]
Line 394: Line 409:
 
:[[List of Intel CPU microarchitectures#Atom Lines|Cherryview]]
 
:[[List of Intel CPU microarchitectures#Atom Lines|Cherryview]]
  
   | group3 = Goldmont
+
   | group3 = [[Goldmont]]
 
   | list3 =
 
   | list3 =
 
;14&nbsp;nm
 
;14&nbsp;nm
 
:[[Goldmont]]
 
:[[Goldmont]]
 
:[[Goldmont Plus]]
 
:[[Goldmont Plus]]
 +
  | group4 = [[Tremont (microarchitecture)|Tremont]]
 +
  | list4 =
 +
;10&nbsp;nm
 +
:[[Tremont (microarchitecture)|Tremont]]
 +
:[[Gracemont (microarchitecture)|Gracemont]]
 
  }}
 
  }}
 
  }}
 
  }}

Latest revision as of 18:35, 27 December 2020

Template documentation

Initial visibility: currently defaults to autocollapse

To set this template's initial visibility, the |state= parameter may be used:

  • |state=collapsed: {{Intel processors|state=collapsed}} to show the template collapsed, i.e., hidden apart from its title bar
  • |state=expanded: {{Intel processors|state=expanded}} to show the template expanded, i.e., fully visible
  • |state=autocollapse: {{Intel processors|state=autocollapse}}
    • shows the template collapsed to the title bar if there is a {{navbar}}, a {{sidebar}}, or some other table on the page with the collapsible attribute
    • shows the template in its expanded state if there are no other collapsible items on the page

If the |state= parameter in the template on this page is not set, the template's initial visibility is taken from the |default= parameter in the Collapsible option template. For the template on this page, that currently evaluates to autocollapse.

See also