Difference between revisions of "Template:Intel technology"
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*[[Centrino]] | *[[Centrino]] | ||
*[[Centrino#Montevina platform (2008)|Centrino 2]] | *[[Centrino#Montevina platform (2008)|Centrino 2]] | ||
− | |||
*[[Intel Viiv|Viiv]] | *[[Intel Viiv|Viiv]] | ||
− | *[[Mobile Internet device|MID]] | + | *[[Mobile Internet device#Intel MID platforms|MID]] |
+ | *[[Tablet computer#Intel tablet platforms|Tablet]] | ||
+ | *[[Consumer Ultra-Low Voltage|CULV]] | ||
+ | *[[Ultrabook]] | ||
*[[Intel Skulltrail|Skulltrail]] | *[[Intel Skulltrail|Skulltrail]] | ||
+ | *[[Next Unit of Computing|NUC]] | ||
+ | *[[Intel Galileo|Galileo]] | ||
+ | *[[Intel Edison|Edison]] | ||
+ | *[[Intel Curie|Curie]] | ||
| group2 = Discontinued | | group2 = Discontinued | ||
Line 17: | Line 23: | ||
*[[Common Building Block]] | *[[Common Building Block]] | ||
*[[MultiProcessor Specification]] | *[[MultiProcessor Specification]] | ||
− | |||
*[[Intel Communication Streaming Architecture]] | *[[Intel Communication Streaming Architecture]] | ||
*[[Intel Inboard 386]] | *[[Intel Inboard 386]] | ||
Line 23: | Line 28: | ||
*[[MMC-1]] | *[[MMC-1]] | ||
*[[MMC-2]] | *[[MMC-2]] | ||
− | |||
− | |||
| group3 = Current | | group3 = Current | ||
− | | list3 = | + | | list3 = |
+ | *[[Advanced Programmable Interrupt Controller]] | ||
+ | *[[CNVi]] | ||
+ | *[[Intel Turbo Boost]] | ||
+ | *[[Intel vPro|vPro]] | ||
+ | * [[Intel Secure Key]] | ||
+ | *[[Intel Management Engine]] | ||
+ | *[[Intel Active Management Technology|Active Management Technology]] | ||
+ | **[[Intel AMT versions|AMT versions]] | ||
*[[High-bandwidth Digital Content Protection]] | *[[High-bandwidth Digital Content Protection]] | ||
− | |||
− | |||
*[[Intel High Definition Audio|High Definition Audio]] | *[[Intel High Definition Audio|High Definition Audio]] | ||
− | *[[Intel | + | *[[Intel Hub Architecture|Hub Architecture]] |
− | *[[ | + | *[[Intel Rapid Storage Technology|Rapid Storage Technology]] |
− | *[[ | + | *[[Enhanced SpeedStep]] |
− | *[[ | + | *[[Serial Digital Video Out]] |
+ | *[[Host Embedded Controller Interface]] | ||
+ | *[[Hyper-threading]] | ||
+ | *[[Omni-Path]] | ||
*[[Platform Environment Control Interface]] | *[[Platform Environment Control Interface]] | ||
*[[Intel QuickPath Interconnect|QuickPath Interconnect]] | *[[Intel QuickPath Interconnect|QuickPath Interconnect]] | ||
*[[Platform Controller Hub]] | *[[Platform Controller Hub]] | ||
− | *[[ | + | *[[System Management Bus]] |
− | *[[ | + | *[[Thunderbolt (interface)|Thunderbolt]] |
+ | *[[Intel Ultra Path Interconnect|Ultra Path Interconnect]] | ||
| group4 = Upcoming | | group4 = Upcoming | ||
| list4 = | | list4 = | ||
− | |||
− | |||
*[[Silicon Photonics Link]] | *[[Silicon Photonics Link]] | ||
− | }}<noinclude> | + | }}<noinclude>{{Documentation|content= |
− | + | ==See also== | |
− | + | *{{tl|Intel software}} | |
+ | *{{tl|Intel processors}} | ||
+ | *{{tl|Intel processor roadmap}} | ||
+ | *{{tl|Intel CPU sockets}} | ||
+ | *{{tl|Intel controllers}} | ||
− | [[ | + | [[Category:Computer hardware navigational boxes]] |
− | [[ | + | [[Category:Intel|µ]] |
− | </noinclude> | + | }}</noinclude> |
Latest revision as of 15:37, 12 January 2020

See also
- {{Intel software}}
- {{Intel processors}}
- {{Intel processor roadmap}}
- {{Intel CPU sockets}}
- {{Intel controllers}}
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