Difference between revisions of "Template:AMD APU features"
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! Carrizo | ! Carrizo | ||
! [[List_of_AMD_accelerated_processing_unit_microprocessors#"Bristol_Ridge"_(2016)|Bristol Ridge]] | ! [[List_of_AMD_accelerated_processing_unit_microprocessors#"Bristol_Ridge"_(2016)|Bristol Ridge]] | ||
| − | ! [[ | + | ! [[Ryzen#APUs: Raven Ridge|Raven Ridge]] |
| − | ! style="background: #ececec;" rowspan=" | + | ! [[Ryzen#APUs: Picasso|Picasso]] |
| + | ! style="background: #ececec;" rowspan="21" | | ||
| + | ! Desna, Ontario, Zacate | ||
| + | ! Kabini, Temash | ||
| + | ! Beema, Mullins | ||
| + | ! Carrizo-L | ||
! [[List_of_AMD_accelerated_processing_unit_microprocessors#"Stoney_Ridge"_(2016)|Stoney Ridge]] | ! [[List_of_AMD_accelerated_processing_unit_microprocessors#"Stoney_Ridge"_(2016)|Stoney Ridge]] | ||
|- | |- | ||
| − | | {{rh}} | Platform || colspan=" | + | | {{rh}} | Platform || colspan="8" | Desktop, mobile || colspan="5" | Ultra-mobile |
|- | |- | ||
| − | | {{rh}} | Released || Aug 2011 || Oct 2012 || Jun 2013 || Jan 2014 || Jun 2015 || Jun 2016 || Oct 2017 || Jan 2011 || May 2013 || Q2 2014 || May 2015 || June 2016 | + | | {{rh}} | Released || Aug 2011 || Oct 2012 || Jun 2013 || Jan 2014 || Jun 2015 || Jun 2016 || Oct 2017 || 1Q 2019 || Jan 2011 || May 2013 || Q2 2014 || May 2015 || June 2016 |
|- | |- | ||
| − | | {{rh}} | [[ | + | | {{rh}} | CPU [[microarchitecture]] || [[AMD 10h|K10]] || colspan="2" | [[Piledriver (microarchitecture)|Piledriver]] || [[Steamroller (microarchitecture)|Steamroller]] || colspan="2" | [[Excavator (microarchitecture)|Excavator]] || [[Zen (microarchitecture)|Zen]] || [[Zen+]] || [[Bobcat (microarchitecture)|Bobcat]] || [[Jaguar (microarchitecture)|Jaguar]] || [[Puma (microarchitecture)|Puma]] || [[Puma (microarchitecture)#Puma+|Puma+]]<ref>{{cite press |url=https://www.amd.com/en-us/press-releases/Pages/amd-mobile-carrizo-2014nov20.aspx |title=AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015 |date=20 November 2014 |accessdate=16 February 2015}}</ref> || [[Excavator (microarchitecture)|Excavator]] |
|- | |- | ||
| − | | {{rh}} | [[ | + | | {{rh}} | GPU [[microarchitecture]] || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="2" | [[TeraScale (microarchitecture)#TeraScale 3 "Northern Islands"-family|TeraScale 3 (VLIW4)]] || [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || colspan="2" | [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]] || colspan="2" | [[Graphics Core Next#GCN 5th generation|GCN 5th gen]]<ref name="Vega codenames">{{cite web |url=http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ |title=AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver |publisher=VideoCardz.com |accessdate=6 June 2017}}</ref> || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="3" | [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]]<ref name="Vega codenames" /> |
|- | |- | ||
| − | | {{rh}} | [[ | + | | {{rh}} | [[Instruction set]] || colspan="3" | [[TeraScale (microarchitecture)|TeraScale]] instruction set || colspan="5" | [[Graphics Core Next#Instruction set|GCN instruction set]] || [[TeraScale (microarchitecture)|TeraScale]] instruction set || colspan="4" | [[Graphics Core Next#Instruction set|GCN instruction set]] |
|- | |- | ||
| − | | {{rh}} | [[ | + | | {{rh}} | [[Semiconductor device fabrication|Fab.]] ([[Nanometre|nm]]) || colspan="3" | [[GlobalFoundries]] [[32 nanometer|32]] [[Silicon on insulator|SOI]] || colspan="3" | GlobalFoundries 28 SHP || GlobalFoundries [[14 nanometer|14LPP]] || GlobalFoundries [[14 nanometer|12LP]] || [[TSMC]] 40 || colspan="4" | 28 |
| − | |||
| − | |||
| − | | colspan=4 | | ||
|- | |- | ||
| − | | | + | | {{rh}} | [[Die (integrated circuit)|die]] area (mm<sup>2</sup>) || 228 || colspan="2" | 246 || 245 || 245 || 250 || 210<ref>{{cite web|title=The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List|url=https://www.techarp.com/guides/mobile-cpu-comparison-guide/5/ |accessdate=13 December 2017|publisher=TechARP.com}}</ref> || {{dunno}} || 75 (+ 28 [[List of AMD chipsets#Fusion controller hubs (FCH)|FCH]]) || colspan="2" | ~107 || {{dunno}} || 125 |
|- | |- | ||
| − | | Up to 400:20:8 || colspan=2 | Up to 384:24:6 || colspan=3 | Up to 512:32:8 || Up to 704:44:16<ref>{{cite news|last1=Cutress|first1=Ian|title=Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm|url=https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3|accessdate=7 February 2018|publisher=Anandtech|date=1 February 2018}}</ref> || 80:8:4 || colspan=3 | 128:8:4 || Up to 192:?:? | + | | {{rh}} | [[Template:AMD CPU sockets|Socket]] || [[Socket FM1|FM1]], [[Socket FS1|FS1]] || colspan="2" | [[Socket FM2|FM2]], [[Socket FS1r2|FS1+]], [[Socket FP2|FP2]] || [[Socket FM2+|FM2+]], [[Socket FP3|FP3]] || [[Socket FM2+|FM2+]]{{efn|APU models: A8-7680, A6-7480. CPU only: Athlon X4 845.}}, [[Socket FP4|FP4]] || [[Socket AM4|AM4]], [[Socket FP4|FP4]] || colspan="2" | [[Socket AM4|AM4]], [[Socket FP5|FP5]] || [[Socket FT1|FT1]] || [[Socket AM1|AM1]], [[Socket FT3|FT3]] || [[Socket FT3b|FT3b]] || colspan="2" | [[Socket FP4|FP4]] |
| − | + | |- | |
| − | + | | {{rh}} | Memory support || colspan="5" | [[DDR3 SDRAM|DDR3]] || colspan="3" | [[DDR4 SDRAM|DDR4]] || colspan="4" | DDR3L || DDR4 | |
| − | + | |- style="border-top:2px solid grey" | |
| − | + | | rowspan="2" {{rh}} | 3D engine{{efn|[[Unified shader model|Unified shaders]] : [[texture mapping unit]]s : [[render output unit]]s}} || Up to 400:20:8 || colspan="2" | Up to 384:24:6 || colspan="3" | Up to 512:32:8 || Up to 704:44:16<ref>{{cite news|last1=Cutress|first1=Ian|title=Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm|url=https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3|accessdate=7 February 2018|publisher=Anandtech|date=1 February 2018}}</ref> || Up to 704:44:16 || 80:8:4 || colspan="3" | 128:8:4 || Up to 192:?:? | |
|- | |- | ||
| − | | {{ | + | | colspan="3" | IOMMUv1 || colspan="5" | [[Heterogeneous Memory Management|IOMMUv2]] || colspan="3" | IOMMUv1 || colspan="2" {{dunno}} |
| + | |- style="border-top:2px solid grey" | ||
| + | | {{rh}} | Video decoder || colspan="3" | [[Unified Video Decoder#UVD 3|UVD 3.0]] || [[Unified Video Decoder#UVD 4.2|UVD 4.2]] || colspan="2" | [[Unified Video Decoder#UVD 6|UVD 6.0]] || rowspan="2" colspan="2" | [[Unified Video Decoder#VCN 1|VCN 1.0]]<ref>{{cite news|last1=Larabel|first1=Michael|title=Radeon VCN Encode Support Lands in Mesa 17.4 Git|url=https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands|accessdate=20 November 2017|publisher=Phoronix|date=17 November 2017}}</ref> || [[Unified Video Decoder#UVD 3|UVD 3.0]] || [[Unified Video Decoder#UVD 4|UVD 4.0]] || [[Unified Video Decoder#UVD 4.2|UVD 4.2]] || [[Unified Video Decoder#UVD 6|UVD 6.0]] || [[Unified Video Decoder#UVD 6|UVD 6.3]] | ||
|- | |- | ||
| − | | {{rh}} | | + | | {{rh}} | Video encoder || {{N/A}} || colspan="2" | [[Video Coding Engine#VCE 1.0|VCE 1.0]] || [[Video Coding Engine#VCE 2.0|VCE 2.0]] || colspan="2" | [[Video Coding Engine#VCE 3.0|VCE 3.1]] || {{N/A}} || colspan="2" | [[Video Coding Engine#VCE 2.0|VCE 2.0]] || colspan="2" | [[Video Coding Engine#VCE 3.0|VCE 3.1]] |
|- | |- | ||
| − | | {{rh}} | [[AMD | + | | {{rh}} | GPU power saving || [[AMD PowerPlay|PowerPlay]] || colspan="7" | [[AMD PowerTune|PowerTune]] || {{N/A}} || colspan="4" | [[AMD PowerTune|PowerTune]]<ref>{{citation |url=http://meseec.ce.rit.edu/551-projects/fall2014/3-4.pdf |title=AMD's Graphics Core Next (GCN) Architecture |author=Tony Chen |author2=Jason Greaves |work=AMD |accessdate=13 August 2016}}</ref> |
|- | |- | ||
| − | | {{rh}} | [[AMD TrueAudio|TrueAudio]] || colspan=3 {{N/A}} || colspan= | + | | {{rh}} | [[AMD TrueAudio|TrueAudio]] || colspan="3" {{N/A}} || colspan="5" {{ya}}<ref>{{cite web |url=http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/ |title=A technical look at AMD's Kaveri architecture |publisher=Semi Accurate |accessdate=6 July 2014}}</ref> || colspan="4" {{N/A}} || {{dunno}} |
|- | |- | ||
| − | | {{rh}} | [[FreeSync]] || colspan=3 {{N/A}} || colspan= | + | | {{rh}} | [[FreeSync]] || colspan="3" {{N/A}} || colspan="5" style="background:#DFD;" | 1<br />2 || colspan="4" {{N/A}} || {{dunno}} |
| + | |- | ||
| + | | {{rh}} | [[HDCP]]{{efn|name="DRM"}} || colspan="3" {{dunno}} || colspan="3" | 1.4 || colspan="2" | 1.4<br />2.2 || {{dunno}} || colspan="4" | 1.4 | ||
|- | |- | ||
| − | | {{rh}} | [[ | + | | {{rh}} | [[AMD Eyefinity|Supported displays]]{{efn|To feed more than two displays, the additional panels must have native [[DisplayPort]] support.<ref>{{cite web | url=http://support.amd.com/en-us/search/faq/154 | title=How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card? | publisher=AMD | accessdate=8 December 2014}}</ref> Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.}} || 2–3 || colspan="3" | 2–4 || 3 || 4 || colspan="2" {{dunno}} || colspan="3" | 2 || colspan="2" {{dunno}} |
| − | |- style="border- | + | |- style="border-top:2px solid grey" |
| − | + | | {{rh}} | <code>/drm/radeon</code>{{efn|name="drm"}}<ref>{{cite web |url=http://airlied.livejournal.com/68805.html |title=DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33 |date=26 November 2009 |accessdate=16 January 2016 |last1=Airlie |first1=David}}</ref><ref name="Radeon Feature Matrix">{{cite web |url=http://xorg.freedesktop.org/wiki/RadeonFeature/ |title=Radeon feature matrix |work=[[freedesktop.org]] |accessdate=10 January 2016}}</ref> || colspan="5" {{ya}} || colspan="3" {{N/A}} || colspan="4" {{ya}} || {{N/A}} | |
| − | | colspan=5 {{ya}} || colspan= | ||
|- | |- | ||
| − | + | | {{rh}} | <code>/drm/amdgpu</code>{{efn|name="drm"}}<ref>{{cite web |url=http://www.x.org/wiki/Events/XDC2015/Program/deucher_zhou_amdgpu.pdf |title=XDC2015: AMDGPU |date=16 September 2015 |last1=Deucher |first1=Alexander |accessdate=16 January 2016}}</ref> || colspan="3" {{N/A}} || {{ya}}<ref name="amdgpu_1.2">{{cite web |url=https://lists.x.org/archives/xorg-announce/2016-November/002741.html |title=[ANNOUNCE] xf86-video-amdgpu 1.2.0 |author=Michel Dänzer |work=lists.x.org |date=17 November 2016}}</ref> || colspan="4" {{ya}} || {{N/A}} || colspan="3" {{ya}}<ref name="amdgpu_1.2"/> || {{ya}} | |
| − | | colspan=3 {{N/A}} || {{ya}}<ref name="amdgpu_1.2">{{cite web |url=https://lists.x.org/archives/xorg-announce/2016-November/002741.html |title=[ANNOUNCE] xf86-video-amdgpu 1.2.0 |author=Michel Dänzer |work=lists.x.org |date=17 November 2016}}</ref> || colspan= | ||
|} | |} | ||
| − | |||
{{noteslist|refs= | {{noteslist|refs= | ||
{{efn|name="drm"|DRM ([[Direct Rendering Manager]]) is a component of the Linux kernel. Support in this table refers to the most current version.}} | {{efn|name="drm"|DRM ([[Direct Rendering Manager]]) is a component of the Linux kernel. Support in this table refers to the most current version.}} | ||
{{efn|name="DRM"|To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.}} | {{efn|name="DRM"|To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.}} | ||
}}<noinclude>{{documentation|content= | }}<noinclude>{{documentation|content= | ||
| − | |||
{{Template reference list}} | {{Template reference list}} | ||
Revision as of 19:12, 8 July 2019
References
- ↑ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015.
- ↑ 2.0 2.1 "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
- ↑ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
- ↑ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
- ↑ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
- ↑ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016
- ↑ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
- ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 8 December 2014.
- ↑ Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016.
- ↑ "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016.
- ↑ Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016.
- ↑ 12.0 12.1 Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.
See also
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