Difference between revisions of "Template:AMD APU features"
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| {{rh}} | FPUs per core || 1 || colspan="5" | 0.5 || colspan="2" | 1 || colspan="4" | 1 || 0.5 | | {{rh}} | FPUs per core || 1 || colspan="5" | 0.5 || colspan="2" | 1 || colspan="4" | 1 || 0.5 | ||
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| + | | {{rh}} | FPU width || colspan="8" | 128-bit || 64-bit || colspan="4" | 128-bit | ||
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| {{rh}} | GPU [[microarchitecture]] || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="2" | [[TeraScale (microarchitecture)#TeraScale 3 "Northern Islands"-family|TeraScale 3 (VLIW4)]] || [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || colspan="2" | [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]] || colspan="2" | [[Graphics Core Next#GCN 5th generation|GCN 5th gen]]<ref name="Vega codenames">{{cite web |url=http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ |title=AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver |publisher=VideoCardz.com |accessdate=6 June 2017}}</ref> || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="3" | [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]]<ref name="Vega codenames" /> | | {{rh}} | GPU [[microarchitecture]] || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="2" | [[TeraScale (microarchitecture)#TeraScale 3 "Northern Islands"-family|TeraScale 3 (VLIW4)]] || [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || colspan="2" | [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]] || colspan="2" | [[Graphics Core Next#GCN 5th generation|GCN 5th gen]]<ref name="Vega codenames">{{cite web |url=http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/ |title=AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver |publisher=VideoCardz.com |accessdate=6 June 2017}}</ref> || [[TeraScale (microarchitecture)#TeraScale 2 "Evergreen"-family|TeraScale 2 (VLIW5)]] || colspan="3" | [[Graphics Core Next#GCN 2nd generation|GCN 2nd gen]] || [[Graphics Core Next#GCN 3rd generation|GCN 3rd gen]]<ref name="Vega codenames" /> | ||
Revision as of 04:05, 29 December 2019
The following table shows features of AMD's APUs (see also: List of AMD accelerated processing units).
References
- ↑ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015.
- ↑ 2.0 2.1 "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
- ↑ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
- ↑ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
- ↑ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
- ↑ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016
- ↑ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
- ↑ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 8 December 2014.
- ↑ Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016.
- ↑ "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016.
- ↑ Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016.
- ↑ 12.0 12.1 Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.
See also
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