Difference between revisions of "Template:AMD V1000 series"

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!rowspan=3 | Release<br />date
 
!rowspan=3 | Release<br />date
 
!rowspan=3 | Fab
 
!rowspan=3 | Fab
!colspan=5 | CPU
+
!colspan=6 | CPU
 
!colspan=4 | GPU
 
!colspan=4 | GPU
 
!rowspan=3 | [[Memory controller|Memory<br />support]]
 
!rowspan=3 | [[Memory controller|Memory<br />support]]
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!rowspan=2 | [[Multi-core processor|Cores]]/[[Floating-point unit|FPUs]]<br />[[thread (computing)|(threads)]]
 
!rowspan=2 | [[Multi-core processor|Cores]]/[[Floating-point unit|FPUs]]<br />[[thread (computing)|(threads)]]
 
!colspan=2 | [[Clock rate]] ([[Gigahertz|GHz]])
 
!colspan=2 | [[Clock rate]] ([[Gigahertz|GHz]])
!colspan=2 | [[Cache memory|Cache]]{{efn|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
+
!colspan=3 | [[Cache memory|Cache]]{{efn|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
 
!rowspan=2 | Model
 
!rowspan=2 | Model
 
!rowspan=2 | Config{{efn|name="cconfig"}}
 
!rowspan=2 | Config{{efn|name="cconfig"}}
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! {{abbr|Base|3+ active cores}}
 
! {{abbr|Base|3+ active cores}}
 
! {{abbr|Boost|1–2 active cores}}
 
! {{abbr|Boost|1–2 active cores}}
 +
! [[L1 cache|L1]]
 
! [[L2 cache|L2]]
 
! [[L2 cache|L2]]
 
! [[L3 cache|L3]]
 
! [[L3 cache|L3]]
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| 2.3
 
| 2.3
 
| 3.2
 
| 3.2
| 1 MB
+
| rowspan=4 | 64 KiB inst.<br />32 KiB data<br />per core
 +
| rowspan=4 | 512 KiB<br /> per core
 
| rowspan=4 |4 MB
 
| rowspan=4 |4 MB
 
| RX Vega 3
 
| RX Vega 3
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| 2.0
 
| 2.0
 
| rowspan=2 | 3.6
 
| rowspan=2 | 3.6
| rowspan=3 | 2 MB
 
 
| rowspan=2 | RX Vega 8
 
| rowspan=2 | RX Vega 8
 
| rowspan=2 | 512:32:16<br />8 CU
 
| rowspan=2 | 512:32:16<br />8 CU

Revision as of 07:56, 3 January 2020

Model Release
date
Fab CPU GPU Memory
support
TDP
Cores/FPUs
(threads)
Clock rate (GHz) Cache[lower-alpha 1] Model Config[lower-alpha 2] Clock Processing
power
(GFLOPS)[lower-alpha 3]
Base Boost L1 L2 L3
V1202B Template:Unk 14nm 2 (4) 2.3 3.2 64 KiB inst.
32 KiB data
per core
512 KiB
per core
4 MB RX Vega 3 192:12:16
3 CU
1000 MHz 384 DDR4-2400
dual-channel
12–25 W
V1605B Template:Unk 4 (8) 2.0 3.6 RX Vega 8 512:32:16
8 CU
1100 MHz 1126.4
V1756B Template:Unk 3.25 1300 MHz 1331.2 DDR4-3200
dual-channel
35–54 W
V1807B Template:Unk 3.35 3.8 RX Vega 11 704:44:16
11 CU
1830.4
  1. AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.[1]
  2. Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  3. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

References

  1. "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors. AMD. Retrieved 14 July 2017.