Difference between revisions of "Template:Cpulist"

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("end" support for end header and table close)
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<includeonly><!--
 
<includeonly><!--
 
-->{{#ifeq:{{{2}}}|head|{{(!}} class="wikitable"}}
 
-->{{#ifeq:{{{2}}}|head|{{(!}} class="wikitable"}}
{{cpulist/{{{1|nehalem}}}|
+
{{cpulist/{{{1|nehalem}}}
  delim{{#ifeq:{{{2}}}|head||x}}=!
+
|section={{{section|}}}
  
|section={{{section|}}}
+
|delim={{#switch: {{{2}}}
 +
| end | head = !
 +
| {{!}}
 +
}}
  
 
|model={{#switch: {{{2}}}
 
|model={{#switch: {{{2}}}
  | head = Model<br/>number
+
  | end | head = Model<br/>number
 
  | {{#if: {{{ark|}}}|[http://ark.intel.com/products/{{{ark}}} {{{model|}}}]|{{{model|}}} }}
 
  | {{#if: {{{ark|}}}|[http://ark.intel.com/products/{{{ark}}} {{{model|}}}]|{{{model|}}} }}
 
}}
 
}}
  
 
|sspec={{#switch: {{{2}}}
 
|sspec={{#switch: {{{2}}}
  | head = sSpec<br/>number
+
  | end | head = sSpec<br/>number
 
  | {{#if:{{{sspec1|}}}{{{sspec2|}}}{{{sspec3|}}}{{{sspec4|}}}{{{sspec5|}}}{{{sspec6|}}}{{{sspec7|}}}{{{sspec8|}}}{{{sspec|}}}|{{plainlist|<!--
 
  | {{#if:{{{sspec1|}}}{{{sspec2|}}}{{{sspec3|}}}{{{sspec4|}}}{{{sspec5|}}}{{{sspec6|}}}{{{sspec7|}}}{{{sspec8|}}}{{{sspec|}}}|{{plainlist|<!--
 
   -->{{#if:{{{sspec1|}}}|* {{{sspec1}}}{{#if:{{{step1|}}}|&nbsp;({{{step1}}})}} }}<!--
 
   -->{{#if:{{{sspec1|}}}|* {{{sspec1}}}{{#if:{{{step1|}}}|&nbsp;({{{step1}}})}} }}<!--
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|freq={{#switch: {{{2}}}
 
|freq={{#switch: {{{2}}}
  | head = Frequency
+
  | end | head = Frequency
 
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{upi|}}}{{{dmi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|baytrail=333|}}|
 
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{upi|}}}{{{dmi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|baytrail=333|}}|
 
     {{#if: {{{mult|}}}|
 
     {{#if: {{{mult|}}}|
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<!--
 
<!--
 
|freq={{#switch: {{{2}}}
 
|freq={{#switch: {{{2}}}
  | head = Frequency
+
  | end | head = Frequency
 
  | penryn
 
  | penryn
 
  | penrynulv
 
  | penrynulv
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|cores = {{{cores|{{#switch: {{{2}}}
 
|cores = {{{cores|{{#switch: {{{2}}}
  | head = Cores
+
  | end | head = Cores
 
  | gulftown
 
  | gulftown
 
  | gulftownup = 6
 
  | gulftownup = 6
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|threads = {{#switch: {{{2}}}
 
|threads = {{#switch: {{{2}}}
  | head = Cores<br/>(Threads)
+
  | end | head = Cores<br/>(Threads)
 
  | {{{cores}}}  ({{{threads|}}})
 
  | {{{cores}}}  ({{{threads|}}})
 
}}
 
}}
  
 
|turbo={{#switch: {{{2}}}
 
|turbo={{#switch: {{{2}}}
  | head = [[Intel Turbo Boost|Turbo]]
+
  | end | head = [[Intel Turbo Boost|Turbo]]
 
  | {{{turbo|{{n/a}}}}}
 
  | {{{turbo|{{n/a}}}}}
 
}}
 
}}
  
 
|turboboost={{#switch: {{{2}}}
 
|turboboost={{#switch: {{{2}}}
  | head = [[Intel Turbo Boost|Turbo Boost]]<br/>All-Core/2.0<br/>(/Max 3.0)
+
  | end | head = [[Intel Turbo Boost|Turbo Boost]]<br/>All-Core/2.0<br/>(/Max 3.0)
 
  | {{{turbo|{{n/a}}}}}
 
  | {{{turbo|{{n/a}}}}}
 
}}
 
}}
  
 
|burst={{#switch: {{{2}}}
 
|burst={{#switch: {{{2}}}
  | head = Burst
+
  | end | head = Burst
 
  | {{#if: {{{burst|}}}|{{{burst}}} GHz|{{n/a}}}}
 
  | {{#if: {{{burst|}}}|{{{burst}}} GHz|{{n/a}}}}
 
}}
 
}}
  
 
|uncore={{#switch: {{{2}}}
 
|uncore={{#switch: {{{2}}}
  | head = [[Uncore|Uncore<br/>speed]]
+
  | end | head = [[Uncore|Uncore<br/>speed]]
 
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{{upi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}|
 
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{{upi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}|
 
   {{#if: {{{uncore|}}}|
 
   {{#if: {{{uncore|}}}|
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|l1={{#switch: {{{2}}}
 
|l1={{#switch: {{{2}}}
  | head = [[CPU caches#Multi-level caches|L1<br/>Cache]]
+
  | end | head = [[CPU caches#Multi-level caches|L1<br/>Cache]]
 
  | tillamook | p55ctp | p55lm | p55c = {{#switch: {{{l1|}}}
 
  | tillamook | p55ctp | p55lm | p55c = {{#switch: {{{l1|}}}
 
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
 
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
Line 239: Line 242:
  
 
|l2={{#switch: {{{2}}}
 
|l2={{#switch: {{{2}}}
  | head = [[CPU cache#Multi-level caches|L2<br/>cache]]
+
  | end | head = [[CPU cache#Multi-level caches|L2<br/>cache]]
 
  | silverthorne
 
  | silverthorne
 
  | diamondville
 
  | diamondville
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|l3={{#switch: {{{2}}}
 
|l3={{#switch: {{{2}}}
  | head = [[CPU cache#Multi-level caches|L3<br/>cache]]
+
  | end | head = [[CPU cache#Multi-level caches|L3<br/>cache]]
 
  | lynnfield
 
  | lynnfield
 
  | clarksfield
 
  | clarksfield
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|iobus={{#switch: {{{2}}}
 
|iobus={{#switch: {{{2}}}
  | head = I/O bus
+
  | end | head = I/O bus
 
  | beckton = {{#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
 
  | beckton = {{#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
 
  | gulftown
 
  | gulftown
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|fsb={{#switch: {{{2}}}
 
|fsb={{#switch: {{{2}}}
  | head = [[Front-side bus|FSB]]
+
  | end | head = [[Front-side bus|FSB]]
 
  | diamondville = {{{fsb|533}}} {{#if: {{{links|}}}|MT/s|MT/s}}
 
  | diamondville = {{{fsb|533}}} {{#if: {{{links|}}}|MT/s|MT/s}}
 
  | dunnington
 
  | dunnington
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|mult={{#switch: {{{2}}}
 
|mult={{#switch: {{{2}}}
  | head = [[CPU multiplier|Mult.]]
+
  | end | head = [[CPU multiplier|Mult.]]
 
  | {{#if:{{{mult|}}}|{{{mult}}}×}}
 
  | {{#if:{{{mult|}}}|{{{mult}}}×}}
 
}}
 
}}
  
 
|gfxclock={{#switch: {{{2}}}
 
|gfxclock={{#switch: {{{2}}}
  | head = GPU<br/>frequency
+
  | end | head = GPU<br/>frequency
 
  | {{#if:{{{gfxclock|}}}|{{{gfxclock}}} {{#if: {{{links|}}}|MHz|MHz}}|{{N/a}}}}
 
  | {{#if:{{{gfxclock|}}}|{{{gfxclock}}} {{#if: {{{links|}}}|MHz|MHz}}|{{N/a}}}}
 
}}
 
}}
  
 
|mem={{#switch: {{{2}}}
 
|mem={{#switch: {{{2}}}
  | head = [[Memory controller|Memory]]
+
  | end | head = [[Memory controller|Memory]]
 
  | gainestown
 
  | gainestown
 
  | bloomfield  = {{{mem|3 × DDR3-{{{memspeed|1066}}} }}}
 
  | bloomfield  = {{{mem|3 × DDR3-{{{memspeed|1066}}} }}}
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|connectivity =  {{#switch: {{{2}}}
 
|connectivity =  {{#switch: {{{2}}}
  | head = Connectivity
+
  | end | head = Connectivity
 
  | {{#if: {{{connectivity|}}}|{{{connectivity}}}|{{n/a}}}}
 
  | {{#if: {{{connectivity|}}}|{{{connectivity}}}|{{n/a}}}}
 
}}
 
}}
  
 
|volt = {{#switch: {{{2}}}
 
|volt = {{#switch: {{{2}}}
  | head = [[CPU core voltage|Voltage]]
+
  | end | head = [[CPU core voltage|Voltage]]
 
  | {{#if:{{{volt|}}}|{{{volt}}}|
 
  | {{#if:{{{volt|}}}|{{{volt}}}|
 
     {{#if:{{{vmin|}}}|{{{vmin}}}{{#if:{{{vmax|}}}|–{{{vmax}}}}}&nbsp;V}}
 
     {{#if:{{{vmin|}}}|{{{vmin}}}{{#if:{{{vmax|}}}|–{{{vmax}}}}}&nbsp;V}}
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|sdp =  {{#switch: {{{2}}}
 
|sdp =  {{#switch: {{{2}}}
  | head = [[Scenario Design Power|SDP]]
+
  | end | head = [[Scenario Design Power|SDP]]
 
  | {{#if: {{{sdp|}}}|{{{sdp}}} W|{{n/a}}}}
 
  | {{#if: {{{sdp|}}}|{{{sdp}}} W|{{n/a}}}}
 
}}
 
}}
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   -->{{#if:{{{tdp|}}}|{{{tdp}}}&nbsp;W}}<!--
 
   -->{{#if:{{{tdp|}}}|{{{tdp}}}&nbsp;W}}<!--
 
   -->}} |{{#switch: {{{2}}}
 
   -->}} |{{#switch: {{{2}}}
  | head = [[Thermal design power|TDP]]
+
  | end | head = [[Thermal design power|TDP]]
 
  | lynnfield  = {{{tdp|95}}} W
 
  | lynnfield  = {{{tdp|95}}} W
 
  | bloomfield  = {{{tdp|130}}} W
 
  | bloomfield  = {{{tdp|130}}} W
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   -->{{#if:{{{sock|}}}|{{{sock}}}}}<!--  otherwise, take a guess with just sock
 
   -->{{#if:{{{sock|}}}|{{{sock}}}}}<!--  otherwise, take a guess with just sock
 
   -->}} |{{#switch: {{{2}}}
 
   -->}} |{{#switch: {{{2}}}
  | head = [[CPU socket|Socket]]
+
  | end | head = [[CPU socket|Socket]]
 
  | haswell =  {{#switch: {{{sock}}}
 
  | haswell =  {{#switch: {{{sock}}}
 
                   |bga | BGA | FC-BGA10
 
                   |bga | BGA | FC-BGA10
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|gfxmodel = {{#switch: {{{2}}}
 
|gfxmodel = {{#switch: {{{2}}}
  | head = GPU<br/>model
+
  | end | head = GPU<br/>model
 
  | sandybridge|ivybridge|haswell|baytrail|skylake = {{#switch: {{{gfxmodel}}}
 
  | sandybridge|ivybridge|haswell|baytrail|skylake = {{#switch: {{{gfxmodel}}}
 
   |4eu = {{#if: {{{links|}}}|[[HD Graphics]] (4&nbsp;EUs)|HD Graphics (4&nbsp;EUs)}}
 
   |4eu = {{#if: {{{links|}}}|[[HD Graphics]] (4&nbsp;EUs)|HD Graphics (4&nbsp;EUs)}}
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|date = {{#switch: {{{2}}}
 
|date = {{#switch: {{{2}}}
  | head = Release date
+
  | end | head = Release date
 
  | {{{date|}}}
 
  | {{{date|}}}
 
}}
 
}}
  
 
|part = {{#switch: {{{2}}}
 
|part = {{#switch: {{{2}}}
  | head = Part<br/>number(s)
+
  | end | head = Part<br/>number(s)
 
  | {{#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part5|}}}{{{part6|}}}{{{part7|}}}{{{part8|}}}{{{part|}}}|{{plainlist|<!--
 
  | {{#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part5|}}}{{{part6|}}}{{{part7|}}}{{{part8|}}}{{{part|}}}|{{plainlist|<!--
 
   -->{{#if:{{{part1|}}}|* {{{part1}}} }}<!--
 
   -->{{#if:{{{part1|}}}|* {{{part1}}} }}<!--
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|price = {{#switch: {{{2}}}
 
|price = {{#switch: {{{2}}}
  | head = Release<br/>price ([[United States dollar|USD]])
+
  | end | head = Release<br/>price ([[United States dollar|USD]])
 
  | {{{price|}}}
 
  | {{{price|}}}
 
}}
 
}}
  
}}</includeonly><noinclude>
+
}}
 +
{{#ifeq:{{{2}}}|end|{{!)}}}}<!--
 +
--></includeonly><noinclude>
 
{{documentation}}
 
{{documentation}}
 
[[Category:Lists of microprocessors|*]]
 
[[Category:Lists of microprocessors|*]]
 
</noinclude>
 
</noinclude>

Revision as of 22:44, 15 December 2017

Template documentation[view] [edit] [history] [purge]

cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.

As a simple example,

 {{cpulist|nehalem|head}}
 {{cpulist|nehalem|gainestown|model=Xeon E5502
 |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
   |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
 {{cpulist|nehalem|end}}

results in a table like

Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Xeon E5502
  • SLBEZ (D0)
1.87 GHz N/A 4 4 × 256 KiB 4 MiB 2 × 4.8 GT/s QPI 14× 3 × DDR3-800 0.75–1.35 V
80 W
LGA 1366 March 30, 2009
  • AT80602000804AA
$188
Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)

Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.

Here is the list of cpulist sub-templates:

Template arguments

The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are

  • lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
  • skylake For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
  • silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
  • haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
  • bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • sandybridge: For lists of the previous Sandy Bridge processors, currently same format as bridge
  • nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
  • nehgfx: like nehalem, but for chips with integrated graphics capability
  • atom: For lists of low-end Atom processors, currently same format as core
  • atomx3: For lists of Atom processors
  • atomgfx: For lists of Atom processors with integrated graphics
  • core: For lists of Intel's previous generation of processors
  • p6: For lists of Intel's p6 generation of processors
  • p5: For lists of Intel's p5 generation of processors

The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:

Other arguments are

  • |anchor=: An arbitrary HTML anchor that can be assigned to an entry
  • |model=: The name of the processor
  • |sspec= or |sspec1=|sspec8=: up to 8 Intel sSpec numbers
    • |step1=|step8=: up to 8 stepping names for the above sSpec numbers
  • |freq=: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz
  • |uncore=: Uncore frequency, in MHz or GHz
  • |turbo=: Turbo frequencies , as increments in clock multiplier
  • |burst=: Burst frequencies , in GHz
  • |igp=: Model of integrated graphics processor
  • |gfxfreq=: clock frequency of the integrated graphics, if applicable
  • |cores=: number of processor cores
    • |threads=: number of processor threads
  • |l1=: size of the Level 1 Cache, in KB
  • |l2=: size of the Level 2 Cache, in KB or MB
  • |l3=: size of the Level 3 Cache, in MB
  • |iobus=: Type and speed of I/O bus interface, may be expressed as one of
    • |fsb=: performance of Front-side bus in MT/s, if applicable
    • |ht=: performance of Hypertransport in MT/s, if applicable
    • |qpi=: performance of Quickpath interface in MT/s, if applicable
    • |dmi=: set to 1 if Direct media interface is in use
  • |mult=: clock multiplier of fsb or base frequency
  • |mem=: memory interface of integrated memory controller, may be expressed as
    • |memspeed=: data rate of integrated memory controller
  • |volt=: core voltage range, usually given as
    • |vmin=: minimum voltage in volts
    • |vmax=: maximum voltage (optional) in volts
  • |tdp= or |tdp1=|tdp8=: Thermal design power in watts
  • |sdp=: Scenario design power in watts
  • |sock= or |sock1=|sock8=: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others
  • |date=: release date
  • |part= or |part1=|part8=: part numbers
  • |price=: price in USD at the time of release

A special argument is

  • |links=: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table