Difference between revisions of "Template:Cpulist/doc"
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* head: A special argument, resulting in a table header | * head: A special argument, resulting in a table header | ||
* [[Gulftown (microprocessor)|gulftown]] | * [[Gulftown (microprocessor)|gulftown]] | ||
| + | * [[Gulftown (microprocessor)|gulftownup]] | ||
* [[Clarkdale (microprocessor)|clarkdale]] | * [[Clarkdale (microprocessor)|clarkdale]] | ||
* [[Arrandale (microprocessor)|arrandale]] | * [[Arrandale (microprocessor)|arrandale]] | ||
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* [[Lynnfield (microprocessor)|lynnfield]] | * [[Lynnfield (microprocessor)|lynnfield]] | ||
* [[Clarksfield (microprocessor)|clarksfield]] | * [[Clarksfield (microprocessor)|clarksfield]] | ||
| + | * [[Jasper Forest (microprocessor)|jasperforest]] | ||
* [[Intel Atom|diamondville]] | * [[Intel Atom|diamondville]] | ||
* [[Intel Atom|silverthorne]] | * [[Intel Atom|silverthorne]] | ||
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* [[Banias (microprocessor)|banias]] | * [[Banias (microprocessor)|banias]] | ||
* [[Tillamook (microprocessor)|tillamook]] | * [[Tillamook (microprocessor)|tillamook]] | ||
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* [[P5 (microprocessor)|p5]] | * [[P5 (microprocessor)|p5]] | ||
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* turbo: Turbo frequencies for Intel Nehalem processors, as increments in clock multiplier | * turbo: Turbo frequencies for Intel Nehalem processors, as increments in clock multiplier | ||
* gfxfreq: clock frequency of the integrated graphics, if applicable | * gfxfreq: clock frequency of the integrated graphics, if applicable | ||
| + | * cores: number of processor cores | ||
* l1: size of the Level 1 Cache, in KiB | * l1: size of the Level 1 Cache, in KiB | ||
* l2: size of the Level 2 Cache, in KiB or MiB | * l2: size of the Level 2 Cache, in KiB or MiB | ||
Revision as of 20:48, 16 June 2010
cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.
As a simple example,
{{cpulist|nehalem|head}}
{{cpulist|nehalem|gainestown|model=Xeon E5502
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
|sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
{{end}}
results in a table like
| Model number |
sSpec number |
Frequency | Turbo | Cores | L2 cache |
L3 cache |
I/O bus | Mult. | Memory | Voltage | TDP | Socket | Release date | Part number(s) |
Release price (USD) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Xeon E5502 |
|
1.87 GHz | N/A | 4 | 4 × 256 KiB | 4 MiB | 2 × 4.8 GT/s QPI | 14× | 3 × DDR3-800 | 0.75–1.35 V | 80 W
|
LGA 1366 | March 30, 2009 |
|
$188 |
Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.
Template arguments
The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are
- nehalem: For lists of Intel's latest generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
- nehgfx: like nehalem, but for chips with integrated graphics capability
- atom: For lists of low-end Atom processors, currently same format as core
- atomgfx: For lists of Atom processors with integrated graphics
- core: For lists of Intel's previous generation of processors
- p6: For lists of Intel's p6 generation of processors
- p5: For lists of Intel's p5 generation of processors
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently
- head: A special argument, resulting in a table header
- gulftown
- gulftownup
- clarkdale
- arrandale
- beckton
- bloomfield
- gainestown
- lynnfield
- clarksfield
- jasperforest
- diamondville
- silverthorne
- pineview
- dunnington
- harpertown
- yorkfield
- wolfdale
- penryn, penrynulv
- tigerton
- clovertown
- kentsfield
- woodcrest
- conroe
- merom
- sossaman
- yonah
- dothan
- banias
- tillamook
- p5
Other arguments are
- model: The name of the processor
- sspec1: up to four Intel sSpec numbers, as sspec1 through sspec4
- step1: up to four stepping names for the above sPec numbers, as step1 through step4
- freq: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz
- uncore: Uncore frequency, in MHz or GHz
- turbo: Turbo frequencies for Intel Nehalem processors, as increments in clock multiplier
- gfxfreq: clock frequency of the integrated graphics, if applicable
- cores: number of processor cores
- l1: size of the Level 1 Cache, in KiB
- l2: size of the Level 2 Cache, in KiB or MiB
- l3: size of the Level 3 Cache, in MiB
- iobus: Type and speed of I/O bus interface, may be expressed as one of
- fsb: performance of Front-side bus in MT/s, if applicable
- ht: performance of Hypertransport in MT/s, if applicable
- qpi: performance of Quickpath interface in MT/s, if applicable
- dmi: set to 1 if Direct media interface is in use
- mult: clock multiplier of fsb or base frequency
- mem: memory interface of integrated memory controller, may be expressed as
- memspeed: data rate of integrated memory controller
- volt: core voltage range, usually given as
- vmin: minimum voltage in volts
- vmax: maximum voltage (optional) in volts
- tdp: Thermal design power in watts
- sock: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others
- sock1: up to three socket types, as sock1 through sock3
- date: release date
- part: part numbers
- part1: part number or order code, up to four, as part1 through part4
- price: price in USD at the time of release
A special argument is
- links: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table