Difference between revisions of "Template:AMD V1000 series"

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blackwiki>E^pi*i batch
m (→‎top: Replacing deprecated {{tooltip}} with {{abbr}}.)
(Removed redundant XFR column)
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!rowspan=3 | Model
 
!rowspan=3 | Model
 
!rowspan=3 | Release<br />date
 
!rowspan=3 | Release<br />date
!colspan=6 | CPU
+
!colspan=5 | CPU
 
!colspan=4 | GPU
 
!colspan=4 | GPU
 
!rowspan=3 | [[Memory controller|Memory<br />support]]
 
!rowspan=3 | [[Memory controller|Memory<br />support]]
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|-
 
|-
 
!rowspan=2 | [[Multi-core processor|Cores]]<br />[[thread (computing)|(threads)]]
 
!rowspan=2 | [[Multi-core processor|Cores]]<br />[[thread (computing)|(threads)]]
!colspan=3 | [[Clock rate]] ([[Gigahertz|GHz]])
+
!colspan=2 | [[Clock rate]] ([[Gigahertz|GHz]])
 
!colspan=2 | [[Cache memory|Cache]]{{efn|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
 
!colspan=2 | [[Cache memory|Cache]]{{efn|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.<ref name="AMD_programming_guide">{{cite web|title=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|url=https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf|website=Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors|publisher=AMD|accessdate=14 July 2017}}</ref>}}
 
!rowspan=2 | Model
 
!rowspan=2 | Model
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! {{abbr|Base|3+ active cores}}
 
! {{abbr|Base|3+ active cores}}
 
! {{abbr|Boost|1–2 active cores}}
 
! {{abbr|Boost|1–2 active cores}}
! {{abbr|XFR|Extended frequency range}}
 
 
! [[L2 cache|L2]]
 
! [[L2 cache|L2]]
 
! [[L3 cache|L3]]
 
! [[L3 cache|L3]]
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| 2.3
 
| 2.3
 
| 3.2
 
| 3.2
| {{unk}}
 
 
| 1 MB
 
| 1 MB
 
| rowspan=4 |4 MB
 
| rowspan=4 |4 MB
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| 2.0
 
| 2.0
 
| rowspan=2 | 3.6
 
| rowspan=2 | 3.6
| {{unk}}
 
 
| rowspan=3 | 2 MB
 
| rowspan=3 | 2 MB
 
| rowspan=2 | RX Vega 8
 
| rowspan=2 | RX Vega 8
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| {{unk}}
 
| {{unk}}
 
| 3.25
 
| 3.25
| {{unk}}
 
 
| rowspan=2 | 1300 MHz
 
| rowspan=2 | 1300 MHz
 
| 1331.2
 
| 1331.2
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| 3.35
 
| 3.35
 
| 3.8
 
| 3.8
| {{unk}}
 
 
| RX Vega 11
 
| RX Vega 11
 
| 704:44:16<br />11 CU
 
| 704:44:16<br />11 CU

Revision as of 13:50, 15 June 2019

Model Release
date
CPU GPU Memory
support
TDP
Cores
(threads)
Clock rate (GHz) Cache[lower-alpha 1] Model Config[lower-alpha 2] Clock Processing power (GFLOPS)[lower-alpha 3]
Base Boost L2 L3
V1202B Template:Unk 2 (4) 2.3 3.2 1 MB 4 MB RX Vega 3 192:12:16
3 CU
1000 MHz 384 DDR4-2400
dual-channel
12–25 W
V1605B Template:Unk 4 (8) 2.0 3.6 2 MB RX Vega 8 512:32:16
8 CU
1100 MHz 1126.4
V1756B Template:Unk 3.25 1300 MHz 1331.2 DDR4-3200
dual-channel
35–54 W
V1807B Template:Unk 3.35 3.8 RX Vega 11 704:44:16
11 CU
1830.4
  1. AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes.[1]
  2. Unified Shaders : Texture Mapping Units : Render Output Units and Compute Units (CU)
  3. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

References

  1. "Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors" (PDF). Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors. AMD. Retrieved 14 July 2017.