Difference between revisions of "Template:AMD V1000 series"
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blackwiki>Wikiinger m (ref fix) |
blackwiki>Radxr3 (Added Release Dates + AMD link) |
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| Line 1: | Line 1: | ||
{|class="wikitable" style="text-align:center;" | {|class="wikitable" style="text-align:center;" | ||
!rowspan=3 | Model | !rowspan=3 | Model | ||
| − | !rowspan=3 | Release<br | + | !rowspan=3 | Release<br>date |
!rowspan=3 | Fab | !rowspan=3 | Fab | ||
!colspan=6 | CPU | !colspan=6 | CPU | ||
!colspan=4 | GPU | !colspan=4 | GPU | ||
| − | !rowspan=3 | [[Memory controller|Memory<br | + | !rowspan=3 | [[Memory controller|Memory<br>support]] |
!rowspan=3 |[[Ethernet]] | !rowspan=3 |[[Ethernet]] | ||
!rowspan=3 | [[Thermal design power|TDP]] | !rowspan=3 | [[Thermal design power|TDP]] | ||
!rowspan=3 | [[Junction temperature]] (°C) | !rowspan=3 | [[Junction temperature]] (°C) | ||
|- | |- | ||
| − | !rowspan=2 | [[Multi-core processor|Cores]]<br | + | !rowspan=2 | [[Multi-core processor|Cores]]<br>[[thread (computing)|(threads)]] |
!colspan=2 | [[Clock rate]] ([[Gigahertz|GHz]]) | !colspan=2 | [[Clock rate]] ([[Gigahertz|GHz]]) | ||
| − | !colspan=3 | [[Cache memory|Cache]]{{efn-lr|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes. | + | !colspan=3 | [[Cache memory|Cache]]{{efn-lr|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes. |
| − | |||
!rowspan=2 | Config{{efn-lr|name=cconfig}} | !rowspan=2 | Config{{efn-lr|name=cconfig}} | ||
!rowspan=2 | Clock | !rowspan=2 | Clock | ||
| − | !rowspan=2 | Processing<br | + | !rowspan=2 | Processing<br>power<br>([[GFLOPS]]){{efn-lr|name=SFLOPS}} |
|- | |- | ||
! {{abbr|Base|3+ active cores}} | ! {{abbr|Base|3+ active cores}} | ||
| Line 24: | Line 23: | ||
! [[L3 cache|L3]] | ! [[L3 cache|L3]] | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1500B | + | ! style="text-align:left;" | V1500B <ref name="Ryzen_SOC">{{cite web|title=Embedded Processor Specifications|url=https://www.amd.com/en/products/specifications/embedded/8191+11961|website=AMD}}</ref> |
| − | + | | rowspan=2 | December 2018 | |
| rowspan=7 | 14nm | | rowspan=7 | 14nm | ||
| rowspan=2 | 4 (8) | | rowspan=2 | 4 (8) | ||
| 2.2 | | 2.2 | ||
| {{n/a}} | | {{n/a}} | ||
| − | | rowspan=7 | 64 KB inst.<br | + | | rowspan=7 | 64 KB inst.<br>32 KB data<br>per core |
| − | | rowspan=7 | 512 KB<br | + | | rowspan=7 | 512 KB<br> per core |
| rowspan=7 |4 MB | | rowspan=7 |4 MB | ||
| rowspan=2 colspan=4 {{n/a}} | | rowspan=2 colspan=4 {{n/a}} | ||
| − | | DDR4-2400 <small><br | + | | DDR4-2400 <small><br>[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small> |
| − | | rowspan="7" | | + | | rowspan="7" | 2× 10GbE |
| 12–25 W | | 12–25 W | ||
| rowspan=3 | 0-105 | | rowspan=3 | 0-105 | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1780B | + | ! style="text-align:left;" | V1780B<ref name="Ryzen_SOC" /> |
| − | |||
| 3.35 | | 3.35 | ||
| 3.6 | | 3.6 | ||
| − | | DDR4-3200 <small><br | + | | DDR4-3200 <small><br>[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small> |
| 35-54 W | | 35-54 W | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1202B | + | ! style="text-align:left;" | V1202B<ref name="Ryzen_SOC" /> |
| − | | | + | | February 2018 |
| 2 (4) | | 2 (4) | ||
| 2.3 | | 2.3 | ||
| Line 55: | Line 53: | ||
| 1000 MHz | | 1000 MHz | ||
| 384 | | 384 | ||
| − | | rowspan=3 |DDR4-2400 <small><br | + | | rowspan=3 | DDR4-2400 <small><br>[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small> |
| rowspan=3 | 12–25 W | | rowspan=3 | 12–25 W | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1404I | + | ! style="text-align:left;" | V1404I<ref name="Ryzen_SOC" /> |
| − | | | + | | December 2018 |
| rowspan=4 | 4 (8) | | rowspan=4 | 4 (8) | ||
| rowspan=2 | 2.0 | | rowspan=2 | 2.0 | ||
| rowspan=3 | 3.6 | | rowspan=3 | 3.6 | ||
| rowspan=3 | RX Vega 8 | | rowspan=3 | RX Vega 8 | ||
| − | | rowspan=3 | 512:32:16<br | + | | rowspan=3 | 512:32:16<br>8 CU |
| rowspan=2 | 1100 MHz | | rowspan=2 | 1100 MHz | ||
| rowspan=2 | 1126.4 | | rowspan=2 | 1126.4 | ||
| -40-105 | | -40-105 | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1605B | + | ! style="text-align:left;" | V1605B<ref name="Ryzen_SOC" /> |
| − | | | + | | rowspan=3 | February 2018 |
| rowspan=3 | 0-105 | | rowspan=3 | 0-105 | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1756B | + | ! style="text-align:left;" | V1756B<ref name="Ryzen_SOC" /> |
| − | |||
| 3.25 | | 3.25 | ||
| rowspan=2 | 1300 MHz | | rowspan=2 | 1300 MHz | ||
| 1331.2 | | 1331.2 | ||
| − | | rowspan=2 |DDR4-3200 <small><br | + | | rowspan=2 | DDR4-3200 <small><br>[[Multi-channel memory architecture#Dual-channel architecture|dual-channel]]</small> |
| rowspan=2 | 35–54 W | | rowspan=2 | 35–54 W | ||
|- | |- | ||
| − | ! style="text-align:left;" | V1807B | + | ! style="text-align:left;" | V1807B<ref name="Ryzen_SOC" /> |
| − | |||
| 3.35 | | 3.35 | ||
| 3.8 | | 3.8 | ||
| RX Vega 11 | | RX Vega 11 | ||
| − | | 704:44:16<br | + | | 704:44:16<br>11 CU |
| 1830.4 | | 1830.4 | ||
|} | |} | ||
Revision as of 15:06, 16 July 2020
| Model | Release date |
Fab | CPU | GPU | Memory support |
Ethernet | TDP | Junction temperature (°C) | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Cores (threads) |
Clock rate (GHz) | Cache{{efn-lr|AMD defines 1 kilobyte (KB) as 1024 bytes, and 1 megabyte (MB) as 1024 kilobytes. | Config[lower-roman 1] | Clock | Processing power (GFLOPS)[lower-roman 2] | |||||||||||
| Base | Boost | L1 | L2 | L3 | ||||||||||||
| V1500B [1] | December 2018 | 14nm | 4 (8) | 2.2 | N/A | 64 KB inst. 32 KB data per core |
512 KB per core |
4 MB | N/A | DDR4-2400 dual-channel |
2× 10GbE | 12–25 W | 0-105 | |||
| V1780B[1] | 3.35 | 3.6 | DDR4-3200 dual-channel |
35-54 W | ||||||||||||
| V1202B[1] | February 2018 | 2 (4) | 2.3 | 3.2 | RX Vega 3 | 192:12:16 3 CU |
1000 MHz | 384 | DDR4-2400 dual-channel |
12–25 W | ||||||
| V1404I[1] | December 2018 | 4 (8) | 2.0 | 3.6 | RX Vega 8 | 512:32:16 8 CU |
1100 MHz | 1126.4 | -40-105 | |||||||
| V1605B[1] | February 2018 | 0-105 | ||||||||||||||
| V1756B[1] | 3.25 | 1300 MHz | 1331.2 | DDR4-3200 dual-channel |
35–54 W | |||||||||||
| V1807B[1] | 3.35 | 3.8 | RX Vega 11 | 704:44:16 11 CU |
1830.4 | |||||||||||
References
Cite error: <ref> tags exist for a group named "lower-roman", but no corresponding <references group="lower-roman"/> tag was found, or a closing </ref> is missing