Difference between revisions of "Template:Cpulist"
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| Line 177: | Line 177: | ||
|uncore={{#switch: {{{2}}} | |uncore={{#switch: {{{2}}} | ||
| − | | head = [[Uncore|Uncore | + | | head = [[Uncore|Uncore speed]] |
| {{#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}| | | {{#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}| | ||
{{#if: {{{uncore|}}}| | {{#if: {{{uncore|}}}| | ||
| Line 221: | Line 221: | ||
|l2={{#switch: {{{2}}} | |l2={{#switch: {{{2}}} | ||
| − | | head = [[CPU cache#Multi-level caches|L2 | + | | head = [[CPU cache#Multi-level caches|L2 cache]] |
| silverthorne | | silverthorne | ||
| diamondville | | diamondville | ||
| Line 274: | Line 274: | ||
|l3={{#switch: {{{2}}} | |l3={{#switch: {{{2}}} | ||
| − | | head = [[CPU cache#Multi-level caches|L3 | + | | head = [[CPU cache#Multi-level caches|L3 cache]] |
| lynnfield | | lynnfield | ||
| clarksfield | | clarksfield | ||
| Line 291: | Line 291: | ||
|iobus={{#switch: {{{2}}} | |iobus={{#switch: {{{2}}} | ||
| − | | head = I/O | + | | head = I/O bus |
| beckton = {{#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}} | | beckton = {{#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}} | ||
| gulftown | | gulftown | ||
| Line 345: | Line 345: | ||
|mult={{#switch: {{{2}}} | |mult={{#switch: {{{2}}} | ||
| − | | head = [[CPU multiplier|Mult]] | + | | head = [[CPU multiplier|Mult.]] |
| {{#if:{{{mult|}}}|{{{mult}}}×}} | | {{#if:{{{mult|}}}|{{{mult}}}×}} | ||
}} | }} | ||
|gfxclock={{#switch: {{{2}}} | |gfxclock={{#switch: {{{2}}} | ||
| − | | head = GPU | + | | head = GPU frequency |
| {{#if:{{{gfxclock|}}}|{{{gfxclock}}} {{#if: {{{links|}}}|MHz|MHz}}}} | | {{#if:{{{gfxclock|}}}|{{{gfxclock}}} {{#if: {{{links|}}}|MHz|MHz}}}} | ||
}} | }} | ||
| Line 488: | Line 488: | ||
|gfxmodel = {{#switch: {{{2}}} | |gfxmodel = {{#switch: {{{2}}} | ||
| − | | head = GPU | + | | head = GPU model |
| sandybridge = {{#switch: {{{gfxmodel}}} | | sandybridge = {{#switch: {{{gfxmodel}}} | ||
|gt1| GT1 |1 | |gt1| GT1 |1 | ||
| Line 500: | Line 500: | ||
|date = {{#switch: {{{2}}} | |date = {{#switch: {{{2}}} | ||
| − | | head = Release | + | | head = Release date |
| {{{date|}}} | | {{{date|}}} | ||
}} | }} | ||
|part = {{#switch: {{{2}}} | |part = {{#switch: {{{2}}} | ||
| − | | head = Part | + | | head = Part number(s) |
| {{#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part|}}}|<ul style="list-style:none; padding:0px; margin:0px"><!-- | | {{#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part|}}}|<ul style="list-style:none; padding:0px; margin:0px"><!-- | ||
-->{{#if:{{{part1|}}}|<li>{{{part1}}}</li>}}<!-- | -->{{#if:{{{part1|}}}|<li>{{{part1}}}</li>}}<!-- | ||
| Line 516: | Line 516: | ||
|price = {{#switch: {{{2}}} | |price = {{#switch: {{{2}}} | ||
| − | | head = Release | + | | head = Release price ([[United States dollar|USD]]) |
| {{{price|}}} | | {{{price|}}} | ||
}} | }} | ||
}} | }} | ||
Revision as of 02:07, 1 April 2011
cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.
As a simple example,
{{cpulist|nehalem|head}}
{{cpulist|nehalem|gainestown|model=Xeon E5502
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
|sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
{{cpulist|nehalem|end}}
results in a table like
Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list. Here is the list of cpulist sub-templates:Template arguments
The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are
- lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
- skylake For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
- silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
- haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
- bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- sandybridge: For lists of the previous Sandy Bridge processors, currently same format as bridge
- nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
- nehgfx: like nehalem, but for chips with integrated graphics capability
- atom: For lists of low-end Atom processors, currently same format as core
- atomx3: For lists of Atom processors
- atomgfx: For lists of Atom processors with integrated graphics
- core: For lists of Intel's previous generation of processors
- p6: For lists of Intel's p6 generation of processors
- p5: For lists of Intel's p5 generation of processors
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:
- head: A special argument, resulting in a table header
- tigerlake, willowcove
- icelake, sunnycove
- kabylake_x
- skylake, skylake_e
- baytrail
- haswell
- ivybridge
- sandybridge
- sandybridge_e
- gulftown
- gulftownup
- clarkdale
- arrandale
- beckton
- bloomfield
- gainestown
- lynnfield
- clarksfield
- jasperforest
- diamondville
- silverthorne
- pineview
- dunnington
- harpertown
- yorkfield
- wolfdale
- penryn, penrynulv
- tigerton
- clovertown
- kentsfield
- woodcrest
- conroe
- merom
- sossaman
- yonah
- dothan
- banias
- tillamook
- p5
Other arguments are
|anchor=: An arbitrary HTML anchor that can be assigned to an entry|model=: The name of the processor|sspec=or|sspec1=…|sspec8=: up to 8 Intel sSpec numbers|step1=…|step8=: up to 8 stepping names for the above sSpec numbers
|freq=: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz|uncore=: Uncore frequency, in MHz or GHz|turbo=: Turbo frequencies , as increments in clock multiplier|burst=: Burst frequencies , in GHz|igp=: Model of integrated graphics processor|gfxfreq=: clock frequency of the integrated graphics, if applicable|cores=: number of processor cores|threads=: number of processor threads
|l1=: size of the Level 1 Cache, in KB|l2=: size of the Level 2 Cache, in KB or MB|l3=: size of the Level 3 Cache, in MB|iobus=: Type and speed of I/O bus interface, may be expressed as one of|fsb=: performance of Front-side bus in MT/s, if applicable|ht=: performance of Hypertransport in MT/s, if applicable|qpi=: performance of Quickpath interface in MT/s, if applicable|dmi=: set to 1 if Direct media interface is in use
|mult=: clock multiplier of fsb or base frequency|mem=: memory interface of integrated memory controller, may be expressed as|memspeed=: data rate of integrated memory controller
|volt=: core voltage range, usually given as|vmin=: minimum voltage in volts|vmax=: maximum voltage (optional) in volts
|tdp=or|tdp1=…|tdp8=: Thermal design power in watts|sdp=: Scenario design power in watts|sock=or|sock1=…|sock8=: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others|date=: release date|part=or|part1=…|part8=: part numbers|price=: price in USD at the time of release
A special argument is
|links=: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table
| Model number | sSpec number | Frequency | Turbo | Cores | L2 cache | L3 cache | I/O bus | Mult. | Memory | Voltage | TDP | Socket | Release date | Part number(s) | Release price (USD) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Xeon E5502 |
|
1.87 GHz | 4 | 4 × 256 KB | 4 MB | 2 × 4.8 GT/s QPI | 14× | 3 × DDR3-800 | 0.75–1.35 V | 80 W | LGA 1366 | March 30, 2009 |
|
$188 | |
| The above documentation is transcluded from Template:Cpulist/doc. (edit | history) Editors can experiment in this template's sandbox (edit | diff) and testcases (create) pages. Please add categories to the /doc subpage. Subpages of this template. |