Difference between revisions of "Template:Cpulist/sandbox"

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imported>Ahecht
(sync sandbox)
 
imported>Ahecht
(make substable)
Line 1: Line 1:
 
<includeonly><!--
 
<includeonly><!--
-->{{#ifeq:{{{2}}}|head|{{(!}} class="wikitable"}}
+
-->{{safesubst<noinclude />:#ifeq:{{{2}}}|head|{{(!}} class="wikitable"}}
 
{{cpulist/{{{1|nehalem}}}
 
{{cpulist/{{{1|nehalem}}}
 
|section={{{section|}}}
 
|section={{{section|}}}
  
|delim={{#switch: {{{2}}}
+
|delim={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = !
 
  | end | head = !
 
  | {{!}}
 
  | {{!}}
 
}}
 
}}
  
|model={{#switch: {{{2}}}
+
|model={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Model<br>number
 
  | end | head = Model<br>number
  | {{#if: {{{ark|}}}|[http://ark.intel.com/products/{{{ark}}} {{{model|}}}]|{{{model|}}} }}
+
  | {{safesubst<noinclude />:#if: {{{ark|}}}|[http://ark.intel.com/products/{{{ark}}} {{{model|}}}]|{{{model|}}} }}
 
}}
 
}}
  
|sspec={{#switch: {{{2}}}
+
|sspec={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = sSpec<br>number
 
  | end | head = sSpec<br>number
  | {{#if:{{{sspec1|}}}{{{sspec2|}}}{{{sspec3|}}}{{{sspec4|}}}{{{sspec5|}}}{{{sspec6|}}}{{{sspec7|}}}{{{sspec8|}}}{{{sspec|}}}|{{plainlist|<!--
+
  | {{safesubst<noinclude />:#if:{{{sspec1|}}}{{{sspec2|}}}{{{sspec3|}}}{{{sspec4|}}}{{{sspec5|}}}{{{sspec6|}}}{{{sspec7|}}}{{{sspec8|}}}{{{sspec|}}}|{{plainlist|<!--
   -->{{#if:{{{sspec1|}}}|* {{{sspec1}}}{{#if:{{{step1|}}}|&nbsp;({{{step1}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec1|}}}|* {{{sspec1}}}{{safesubst<noinclude />:#if:{{{step1|}}}|&nbsp;({{{step1}}})}} }}<!--
   -->{{#if:{{{sspec2|}}}|* {{{sspec2}}}{{#if:{{{step2|}}}|&nbsp;({{{step2}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec2|}}}|* {{{sspec2}}}{{safesubst<noinclude />:#if:{{{step2|}}}|&nbsp;({{{step2}}})}} }}<!--
   -->{{#if:{{{sspec3|}}}|* {{{sspec3}}}{{#if:{{{step3|}}}|&nbsp;({{{step3}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec3|}}}|* {{{sspec3}}}{{safesubst<noinclude />:#if:{{{step3|}}}|&nbsp;({{{step3}}})}} }}<!--
   -->{{#if:{{{sspec4|}}}|* {{{sspec4}}}{{#if:{{{step4|}}}|&nbsp;({{{step4}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec4|}}}|* {{{sspec4}}}{{safesubst<noinclude />:#if:{{{step4|}}}|&nbsp;({{{step4}}})}} }}<!--
   -->{{#if:{{{sspec5|}}}|* {{{sspec5}}}{{#if:{{{step5|}}}|&nbsp;({{{step5}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec5|}}}|* {{{sspec5}}}{{safesubst<noinclude />:#if:{{{step5|}}}|&nbsp;({{{step5}}})}} }}<!--
   -->{{#if:{{{sspec6|}}}|* {{{sspec6}}}{{#if:{{{step6|}}}|&nbsp;({{{step6}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec6|}}}|* {{{sspec6}}}{{safesubst<noinclude />:#if:{{{step6|}}}|&nbsp;({{{step6}}})}} }}<!--
   -->{{#if:{{{sspec7|}}}|* {{{sspec7}}}{{#if:{{{step7|}}}|&nbsp;({{{step7}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec7|}}}|* {{{sspec7}}}{{safesubst<noinclude />:#if:{{{step7|}}}|&nbsp;({{{step7}}})}} }}<!--
   -->{{#if:{{{sspec8|}}}|* {{{sspec8}}}{{#if:{{{step8|}}}|&nbsp;({{{step8}}})}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec8|}}}|* {{{sspec8}}}{{safesubst<noinclude />:#if:{{{step8|}}}|&nbsp;({{{step8}}})}} }}<!--
   -->{{#if:{{{sspec|}}}|{{{sspec}}}}}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sspec|}}}|{{{sspec}}}}}<!--
 
   -->}} }}
 
   -->}} }}
 
}}
 
}}
  
|freq={{#switch: {{{2}}}
+
|freq={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Frequency
 
  | end | head = Frequency
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{upi|}}}{{{dmi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|baytrail=333|}}|
+
  | {{safesubst<noinclude />:#if: {{{fsb|}}}{{{qpi|}}}{{{upi|}}}{{{dmi|}}}{{safesubst<noinclude />:#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|baytrail=333|}}|
     {{#if: {{{mult|}}}|
+
     {{safesubst<noinclude />:#if: {{{mult|}}}|
       {{#expr: ({{#switch: {{{fsb|{{#switch: {{{2}}}|pineview=667|baytrail=333|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}}
+
       {{#expr: ({{safesubst<noinclude />:#switch: {{{fsb|{{safesubst<noinclude />:#switch: {{{2}}}|pineview=667|baytrail=333|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}}
 
           | 50 = 50
 
           | 50 = 50
 
           | 60 = 60
 
           | 60 = 60
Line 48: Line 48:
 
           | 1600 = 400
 
           | 1600 = 400
 
           }} * {{{mult}}}
 
           }} * {{{mult}}}
           {{#ifexpr: ({{{fsb|{{#switch: {{{2}}}|pineview=667|baytrail=332.8|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}} / 4 * {{{mult}}}) < 990|) round 0|/ 1000) round 2}}
+
           {{#ifexpr: ({{{fsb|{{safesubst<noinclude />:#switch: {{{2}}}|pineview=667|baytrail=332.8|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}} / 4 * {{{mult}}}) < 990|) round 0|/ 1000) round 2}}
       }} {{#ifexpr: ({{{fsb|{{#switch: {{{2}}}|pineview=667|baytrail=332.8|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}} / 4 * {{{mult}}}) < 990| {{#if: {{{links|}}}|MHz|MHz}}| {{#if: {{{links|}}}|GHz|GHz}} }}
+
       }} {{#ifexpr: ({{{fsb|{{safesubst<noinclude />:#switch: {{{2}}}|pineview=667|baytrail=332.8|lincroft|tunnelcreek|sandybridge|sandybridge_e|skylake_e|kabylake_x|ivybridge|haswell|skylake=400|533}} }}} / 4 * {{{mult}}}) < 990| {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}}| {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}} }}
     |{{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }} }}
+
     |{{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }} }}
 
     }}
 
     }}
   |{{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }} }}
+
   |{{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }} }}
  
 
   }}
 
   }}
Line 58: Line 58:
  
 
<!--
 
<!--
|freq={{#switch: {{{2}}}
+
|freq={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Frequency
 
  | end | head = Frequency
 
  | penryn
 
  | penryn
Line 76: Line 76:
 
  | yonah
 
  | yonah
 
  | dothan
 
  | dothan
  | banias = {{#switch: {{{fsb}}}
+
  | banias = {{safesubst<noinclude />:#switch: {{{fsb}}}
     | 800 = {{#if: {{{mult|}}}|{{#switch: {{{mult}}}
+
     | 800 = {{safesubst<noinclude />:#if: {{{mult|}}}|{{safesubst<noinclude />:#switch: {{{mult}}}
 
       | 6  = 1.20
 
       | 6  = 1.20
 
       | 6.5 = 1.30
 
       | 6.5 = 1.30
Line 98: Line 98:
 
       | 15  = 3.00
 
       | 15  = 3.00
 
       | {{{freq}}}
 
       | {{{freq}}}
       }} {{#if: {{{links|}}}|GHz|GHz}}
+
       }} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}
 
     }}
 
     }}
     | {{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }} }}
+
     | {{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }} }}
 
   }}
 
   }}
  | {{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }}|
+
  | {{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }}|
     {{#if: {{{mult|}}}|{{#switch: {{{mult}}}
+
     {{safesubst<noinclude />:#if: {{{mult|}}}|{{safesubst<noinclude />:#switch: {{{mult}}}
 
       | 8 = 1.06
 
       | 8 = 1.06
 
       | 9 = 1.20
 
       | 9 = 1.20
Line 126: Line 126:
 
       | 28 = 3.83
 
       | 28 = 3.83
 
       | 29 = 3.96
 
       | 29 = 3.96
       }} {{#if: {{{links|}}}|GHz|GHz}}
+
       }} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}
 
     }}
 
     }}
 
   }}
 
   }}
Line 133: Line 133:
  
  
|cores = {{{cores|{{#switch: {{{2}}}
+
|cores = {{{cores|{{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Cores
 
  | end | head = Cores
 
  | gulftown
 
  | gulftown
Line 177: Line 177:
 
}} }}}
 
}} }}}
  
|threads = {{#switch: {{{2}}}
+
|threads = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Cores<br>(threads)
 
  | end | head = Cores<br>(threads)
 
  | {{{cores}}}  ({{{threads|}}})
 
  | {{{cores}}}  ({{{threads|}}})
 
}}
 
}}
  
|turbo={{#switch: {{{2}}}
+
|turbo={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Intel Turbo Boost|Turbo]]
 
  | end | head = [[Intel Turbo Boost|Turbo]]
 
  | {{{turbo|{{n/a}}}}}
 
  | {{{turbo|{{n/a}}}}}
 
}}
 
}}
  
|turboboost={{#switch: {{{2}}}
+
|turboboost={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Intel Turbo Boost|Turbo Boost]]<br>all-core/2.0<br>(/max. 3.0)
 
  | end | head = [[Intel Turbo Boost|Turbo Boost]]<br>all-core/2.0<br>(/max. 3.0)
 
  | {{{turbo|{{n/a}}}}}
 
  | {{{turbo|{{n/a}}}}}
 
}}
 
}}
  
|burst={{#switch: {{{2}}}
+
|burst={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Burst
 
  | end | head = Burst
  | {{#if: {{{burst|}}}|{{{burst}}} GHz|{{n/a}}}}
+
  | {{safesubst<noinclude />:#if: {{{burst|}}}|{{{burst}}} GHz|{{n/a}}}}
 
}}
 
}}
  
|uncore={{#switch: {{{2}}}
+
|uncore={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Uncore|Uncore<br>speed]]
 
  | end | head = [[Uncore|Uncore<br>speed]]
  | {{#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{{upi|}}}{{#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}|
+
  | {{safesubst<noinclude />:#if: {{{fsb|}}}{{{qpi|}}}{{{dmi|}}}{{{upi|}}}{{safesubst<noinclude />:#switch: {{{2}}}|clarkdale|arrandale|lynnfield|clarksfield|bloomfield|gainestown=533|pineview=667|lincroft=100|tunnelcreek=100|}}|
   {{#if: {{{uncore|}}}|
+
   {{safesubst<noinclude />:#if: {{{uncore|}}}|
       {{#expr: ({{#switch: {{{fsb|{{#switch: {{{2}}}|pineview=667|lincroft=100|tunnelcreek=100|533}} }}}
+
       {{#expr: ({{safesubst<noinclude />:#switch: {{{fsb|{{safesubst<noinclude />:#switch: {{{2}}}|pineview=667|lincroft=100|tunnelcreek=100|533}} }}}
 
           | 50 = 50
 
           | 50 = 50
 
           | 60 = 60
 
           | 60 = 60
Line 216: Line 216:
 
           }} * {{{uncore}}}
 
           }} * {{{uncore}}}
 
           {{#ifexpr: ({{{fsb|533}}} / 4 * {{{uncore}}}) < 9900|) round 0|/ 1000) round 2}}
 
           {{#ifexpr: ({{{fsb|533}}} / 4 * {{{uncore}}}) < 9900|) round 0|/ 1000) round 2}}
       }} {{#ifexpr: ({{{fsb|533}}} / 4 * {{{uncore}}}) < 9900| {{#if: {{{links|}}}|MHz|MHz}}| {{#if: {{{links|}}}|GHz|GHz}} }}
+
       }} {{#ifexpr: ({{{fsb|533}}} / 4 * {{{uncore}}}) < 9900| {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}}| {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}} }}
     |{{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }} }}
+
     |{{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }} }}
 
     }}
 
     }}
   |{{#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{#if: {{{links|}}}|MHz|MHz}} }} }}
+
   |{{safesubst<noinclude />:#if: {{{freq|}}}|{{#ifexpr: {{{freq}}} < 10|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|GHz|GHz}}|{{{freq}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}} }} }}
  
 
   }}
 
   }}
 
}}
 
}}
  
|l1={{#switch: {{{2}}}
+
|l1={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU caches#Multi-level caches|L1<br>cache]]
 
  | end | head = [[CPU caches#Multi-level caches|L1<br>cache]]
  | tillamook | p55ctp | p55lm | p55c = {{#switch: {{{l1|}}}
+
  | tillamook | p55ctp | p55lm | p55c = {{safesubst<noinclude />:#switch: {{{l1|}}}
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
     | {{{l1|16 + 16}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{#if: {{{l1|}}}| (?)}}
+
     | {{{l1|16 + 16}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{safesubst<noinclude />:#if: {{{l1|}}}| (?)}}
 
   }}
 
   }}
  | p54ct | p5t | p24ct | p24t | p54lm | p54cqs | p54cm | p54cs | p54c = {{#switch: {{{l1|}}}
+
  | p54ct | p5t | p24ct | p24t | p54lm | p54cqs | p54cm | p54cs | p54c = {{safesubst<noinclude />:#switch: {{{l1|}}}
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
     | {{{l1|8 + 8}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{#if: {{{l1|}}}| (?)}}
+
     | {{{l1|8 + 8}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{safesubst<noinclude />:#if: {{{l1|}}}| (?)}}
 
   }}
 
   }}
  | p5 = {{#switch: {{{l1|}}}
+
  | p5 = {{safesubst<noinclude />:#switch: {{{l1|}}}
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
     | 16 | 32 = {{#expr: {{{l1}}}/2}} + {{#expr: {{{l1}}}/2}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
     | {{{l1|8 + 8}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{#if: {{{l1|}}}| (?)}}
+
     | {{{l1|8 + 8}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}{{safesubst<noinclude />:#if: {{{l1|}}}| (?)}}
 
   }}
 
   }}
 
  | {{{l1|}}}
 
  | {{{l1|}}}
 
}}
 
}}
  
|l2={{#switch: {{{2}}}
+
|l2={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU cache#Multi-level caches|L2<br>cache]]
 
  | end | head = [[CPU cache#Multi-level caches|L2<br>cache]]
 
  | silverthorne
 
  | silverthorne
Line 247: Line 247:
 
  | pineview
 
  | pineview
 
  | lincroft
 
  | lincroft
  | tunnelcreek = {{{l2|512}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
  | tunnelcreek = {{{l2|512}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
 
  | wolfdale
 
  | wolfdale
 
  | penrynulv
 
  | penrynulv
Line 262: Line 262:
 
  | tanner | drake | katmai
 
  | tanner | drake | katmai
 
  | dixon | mendocino | covington | tonga | deschutes
 
  | dixon | mendocino | covington | tonga | deschutes
  | klamath | p6 = {{#switch: {{{l2|}}}
+
  | klamath | p6 = {{safesubst<noinclude />:#switch: {{{l2|}}}
 
   | 0 = {{n/a}}
 
   | 0 = {{n/a}}
   | 128 = 128 {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
   | 128 = 128 {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
   | 256 = 256 {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
   | 256 = 256 {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
   | 512 = 512 {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
   | 512 = 512 {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
 
   | 1  | 2  | 3  | 4  | 6  =
 
   | 1  | 2  | 3  | 4  | 6  =
         {{{l2}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
         {{{l2}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
   | {{#if: {{{l2|}}}|{{{l2}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]] (?)]|MiB (?)}} }}
+
   | {{safesubst<noinclude />:#if: {{{l2|}}}|{{{l2}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]] (?)]|MiB (?)}} }}
 
   }}
 
   }}
 
  | tigerton
 
  | tigerton
Line 276: Line 276:
 
  | dunnington
 
  | dunnington
 
  | yorkfield
 
  | yorkfield
  | kentsfield = {{#switch: {{{l2|}}}
+
  | kentsfield = {{safesubst<noinclude />:#switch: {{{l2|}}}
 
   | 2  | 3  | 4  | 6  | 8  | 12 =
 
   | 2  | 3  | 4  | 6  | 8  | 12 =
         2 × {{#expr: {{{l2}}}/2}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
         2 × {{#expr: {{{l2}}}/2}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
   | {{#if: {{{l2|}}}|{{{l2}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]] (?)]|MiB (?)}} }}
+
   | {{safesubst<noinclude />:#if: {{{l2|}}}|{{{l2}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]] (?)]|MiB (?)}} }}
 
   }}
 
   }}
  | skylake_e = {{{l2|{{{cores|4}}} × 1}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
  | skylake_e = {{{l2|{{{cores|4}}} × 1}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
 
  | lynnfield
 
  | lynnfield
 
  | clarksfield
 
  | clarksfield
Line 292: Line 292:
 
  | haswell
 
  | haswell
 
  | skylake
 
  | skylake
  | gainestown = {{{l2|{{{cores|4}}} × 256}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
  | gainestown = {{{l2|{{{cores|4}}} × 256}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
 
  | clarkdale
 
  | clarkdale
  | arrandale = {{{l2|{{{cores|2}}} × 256}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
  | arrandale = {{{l2|{{{cores|2}}} × 256}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
 
  | gulftown
 
  | gulftown
  | gulftownup = {{{l2|{{{cores|6}}} × 256}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
  | gulftownup = {{{l2|{{{cores|6}}} × 256}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
  | beckton = {{{l2|{{{cores|8}}} × 256}}} {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
  | beckton = {{{l2|{{{cores|8}}} × 256}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
  | baytrail = {{#switch: {{{l2|}}}
+
  | baytrail = {{safesubst<noinclude />:#switch: {{{l2|}}}
   | 512 = 512 {{#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
+
   | 512 = 512 {{safesubst<noinclude />:#if: {{{links|}}}|[[Kibibyte|KiB]]|KiB}}
   |{{{l2|2}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
   |{{{l2|2}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
 
   }}
 
   }}
 
  | {{{l2|}}}
 
  | {{{l2|}}}
 
}}
 
}}
  
|l3={{#switch: {{{2}}}
+
|l3={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU cache#Multi-level caches|L3<br>cache]]
 
  | end | head = [[CPU cache#Multi-level caches|L3<br>cache]]
 
  | lynnfield
 
  | lynnfield
Line 312: Line 312:
 
  | gainestown
 
  | gainestown
 
  | jasperforest
 
  | jasperforest
  | sandybridge|sandybridge_e|ivybridge|haswell|skylake|skylake_e|kabylake_x = {{{l3|8}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
  | sandybridge|sandybridge_e|ivybridge|haswell|skylake|skylake_e|kabylake_x = {{{l3|8}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
 
  | clarkdale
 
  | clarkdale
  | arrandale = {{{l3|4}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
  | arrandale = {{{l3|4}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
 
  | gulftown
 
  | gulftown
 
  | dunnington
 
  | dunnington
  | gulftownup = {{{l3|12}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
  | gulftownup = {{{l3|12}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
  | beckton = {{{l3|24}}} {{#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
+
  | beckton = {{{l3|24}}} {{safesubst<noinclude />:#if: {{{links|}}}|[[Mebibyte|MiB]]|MiB}}
 
  | {{{l3|}}}
 
  | {{{l3|}}}
 
}}
 
}}
  
|iobus={{#switch: {{{2}}}
+
|iobus={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = I/O bus
 
  | end | head = I/O bus
  | beckton = {{#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
+
  | beckton = {{safesubst<noinclude />:#if:{{{qpi|}}}|4 × {{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|4 × 6.4 GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
 
  | gulftown
 
  | gulftown
  | gainestown = {{#if:{{{qpi|}}}|2 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|2 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
+
  | gainestown = {{safesubst<noinclude />:#if:{{{qpi|}}}|2 × {{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|2 × 6.4 GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
 
  | gulftownup
 
  | gulftownup
  | bloomfield = {{#if:{{{qpi|}}}|1 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|1 × 6.4 GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
+
  | bloomfield = {{safesubst<noinclude />:#if:{{{qpi|}}}|1 × {{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|1 × 6.4 GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}}}
 
  | clarkdale
 
  | clarkdale
 
  | arrandale
 
  | arrandale
Line 334: Line 334:
 
  | clarksfield
 
  | clarksfield
 
  | pineview
 
  | pineview
  | lincroft = {{#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}
+
  | lincroft = {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}
 
  | sandybridge
 
  | sandybridge
 
  | ivybridge
 
  | ivybridge
  | haswell = {{#if: {{{links|}}}|[[Direct Media Interface|DMI 2.0]]|DMI 2.0}}
+
  | haswell = {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI 2.0]]|DMI 2.0}}
  | skylake = {{#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}
+
  | skylake = {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}
  | skylake_e = {{#if:{{{upi|}}}|{{{upi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|UPI}}|{{#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}}}
+
  | skylake_e = {{safesubst<noinclude />:#if:{{{upi|}}}|{{{upi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|UPI}}|{{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}}}
  | kabylake_x = {{#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}
+
  | kabylake_x = {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI 3.0]]|DMI 3.0}}
  | sandybridge_e = {{#if:{{{qpi|}}}|{{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
+
  | sandybridge_e = {{safesubst<noinclude />:#if:{{{qpi|}}}|{{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
                                   {{#if: {{{links|}}}|[[Direct Media Interface|DMI 2.0]]|DMI 2.0}}}}
+
                                   {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI 2.0]]|DMI 2.0}}}}
  | tunnelcreek = {{#if: {{{links|}}}|[[PCI Express|PCIe]]|PCIe}}
+
  | tunnelcreek = {{safesubst<noinclude />:#if: {{{links|}}}|[[PCI Express|PCIe]]|PCIe}}
  | jasperforest = {{#if:{{{qpi|}}}|1 × {{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
+
  | jasperforest = {{safesubst<noinclude />:#if:{{{qpi|}}}|1 × {{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
                                   {{#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}}}
+
                                   {{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}}}
  | {{#if:{{{iobus|}}}|{{{iobus}}}|
+
  | {{safesubst<noinclude />:#if:{{{iobus|}}}|{{{iobus}}}|
     {{#if:{{{qpi|}}}|{{{qpi}}} GT/s {{#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
+
     {{safesubst<noinclude />:#if:{{{qpi|}}}|{{{qpi}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel QuickPath Interconnect|QPI]]|QPI}}|
     {{#if:{{{fsb|}}}|{{{fsb}}} MT/s {{#if: {{{links|}}}|[[Front-side bus|FSB]]|FSB}}|
+
     {{safesubst<noinclude />:#if:{{{fsb|}}}|{{{fsb}}} MT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[Front-side bus|FSB]]|FSB}}|
       {{#if:{{{dmi|}}}|{{#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}|
+
       {{safesubst<noinclude />:#if:{{{dmi|}}}|{{safesubst<noinclude />:#if: {{{links|}}}|[[Direct Media Interface|DMI]]|DMI}}|
       {{#if:{{{ht|}}}|{{{ht}}} GT/s {{#if: {{{links|}}}|[[HyperTransport|HT]]}} }}
+
       {{safesubst<noinclude />:#if:{{{ht|}}}|{{{ht}}} GT/s {{safesubst<noinclude />:#if: {{{links|}}}|[[HyperTransport|HT]]}} }}
 
       }}
 
       }}
 
     }}
 
     }}
Line 357: Line 357:
 
}}
 
}}
  
|fsb={{#switch: {{{2}}}
+
|fsb={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Front-side bus|FSB]]
 
  | end | head = [[Front-side bus|FSB]]
  | diamondville = {{{fsb|533}}} {{#if: {{{links|}}}|MT/s|MT/s}}
+
  | diamondville = {{{fsb|533}}} {{safesubst<noinclude />:#if: {{{links|}}}|MT/s|MT/s}}
 
  | dunnington
 
  | dunnington
 
  | harpertown
 
  | harpertown
Line 380: Line 380:
 
  | tanner | drake | katmai
 
  | tanner | drake | katmai
 
  | dixon | mendocino | covington | tonga | deschutes
 
  | dixon | mendocino | covington | tonga | deschutes
  | klamath | p6 = {{#if: {{{fsb|}}}|{{{fsb}}} {{#if: {{{links|}}}|MT/s|MT/s}}}}
+
  | klamath | p6 = {{safesubst<noinclude />:#if: {{{fsb|}}}|{{{fsb}}} {{safesubst<noinclude />:#if: {{{links|}}}|MT/s|MT/s}}}}
  | {{#if: {{{fsb|}}}|{{{fsb}}} {{#if: {{{links|}}}|MT/s|MT/s}}}}
+
  | {{safesubst<noinclude />:#if: {{{fsb|}}}|{{{fsb}}} {{safesubst<noinclude />:#if: {{{links|}}}|MT/s|MT/s}}}}
 
}}
 
}}
  
|mult={{#switch: {{{2}}}
+
|mult={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU multiplier|Mult.]]
 
  | end | head = [[CPU multiplier|Mult.]]
  | {{#if:{{{mult|}}}|{{{mult}}}×}}
+
  | {{safesubst<noinclude />:#if:{{{mult|}}}|{{{mult}}}×}}
 
}}
 
}}
  
|gfxclock={{#switch: {{{2}}}
+
|gfxclock={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = GPU<br>frequency
 
  | end | head = GPU<br>frequency
  | {{#if:{{{gfxclock|}}}|{{{gfxclock}}} {{#if: {{{links|}}}|MHz|MHz}}|{{N/a}}}}
+
  | {{safesubst<noinclude />:#if:{{{gfxclock|}}}|{{{gfxclock}}} {{safesubst<noinclude />:#if: {{{links|}}}|MHz|MHz}}|{{N/a}}}}
 
}}
 
}}
  
|mem={{#switch: {{{2}}}
+
|mem={{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Memory controller|Memory]]
 
  | end | head = [[Memory controller|Memory]]
 
  | gainestown
 
  | gainestown
Line 412: Line 412:
 
}}
 
}}
  
|connectivity =  {{#switch: {{{2}}}
+
|connectivity =  {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Connectivity
 
  | end | head = Connectivity
  | {{#if: {{{connectivity|}}}|{{{connectivity}}}|{{n/a}}}}
+
  | {{safesubst<noinclude />:#if: {{{connectivity|}}}|{{{connectivity}}}|{{n/a}}}}
 
}}
 
}}
  
|volt = {{#switch: {{{2}}}
+
|volt = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU core voltage|Voltage]]
 
  | end | head = [[CPU core voltage|Voltage]]
  | {{#if:{{{volt|}}}|{{{volt}}}|
+
  | {{safesubst<noinclude />:#if:{{{volt|}}}|{{{volt}}}|
     {{#if:{{{vmin|}}}|{{{vmin}}}{{#if:{{{vmax|}}}|–{{{vmax}}}}}&nbsp;V}}
+
     {{safesubst<noinclude />:#if:{{{vmin|}}}|{{{vmin}}}{{safesubst<noinclude />:#if:{{{vmax|}}}|–{{{vmax}}}}}&nbsp;V}}
 
   }}
 
   }}
 
}}
 
}}
  
|sdp =  {{#switch: {{{2}}}
+
|sdp =  {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Scenario Design Power|SDP]]
 
  | end | head = [[Scenario Design Power|SDP]]
  | {{#if: {{{sdp|}}}|{{{sdp}}} W|{{n/a}}}}
+
  | {{safesubst<noinclude />:#if: {{{sdp|}}}|{{{sdp}}} W|{{n/a}}}}
 
}}
 
}}
  
|tdp = {{#if:{{{tdp1|}}}{{{tdp2|}}}{{{tdp3|}}}{{{tdp4|}}}{{{tdp5|}}}{{{tdp6|}}}{{{tdp7|}}}{{{tdp8|}}}{{{tdp|}}}|{{plainlist|indent=1.25|<!--
+
|tdp = {{safesubst<noinclude />:#if:{{{tdp1|}}}{{{tdp2|}}}{{{tdp3|}}}{{{tdp4|}}}{{{tdp5|}}}{{{tdp6|}}}{{{tdp7|}}}{{{tdp8|}}}{{{tdp|}}}|{{plainlist|indent=1.25|<!--
   -->{{#if:{{{tdp1|}}}|* {{{tdp1}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp1|}}}|* {{{tdp1}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp2|}}}|* {{{tdp2}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp2|}}}|* {{{tdp2}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp3|}}}|* {{{tdp3}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp3|}}}|* {{{tdp3}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp4|}}}|* {{{tdp4}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp4|}}}|* {{{tdp4}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp5|}}}|* {{{tdp5}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp5|}}}|* {{{tdp5}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp6|}}}|* {{{tdp6}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp6|}}}|* {{{tdp6}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp7|}}}|* {{{tdp7}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp7|}}}|* {{{tdp7}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp8|}}}|* {{{tdp8}}}&nbsp;W }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp8|}}}|* {{{tdp8}}}&nbsp;W }}<!--
   -->{{#if:{{{tdp|}}}|{{{tdp}}}&nbsp;W}}<!--
+
   -->{{safesubst<noinclude />:#if:{{{tdp|}}}|{{{tdp}}}&nbsp;W}}<!--
   -->}} |{{#switch: {{{2}}}
+
   -->}} |{{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[Thermal design power|TDP]]
 
  | end | head = [[Thermal design power|TDP]]
 
  | lynnfield  = {{{tdp|95}}} W
 
  | lynnfield  = {{{tdp|95}}} W
Line 463: Line 463:
 
  | banias      = {{{tdp|24.5}}} W
 
  | banias      = {{{tdp|24.5}}} W
 
  | baytrail    = {{n/a}}
 
  | baytrail    = {{n/a}}
  | {{#if: {{{tdp|}}}|{{{tdp}}} W}}
+
  | {{safesubst<noinclude />:#if: {{{tdp|}}}|{{{tdp}}} W}}
 
}}
 
}}
 
}}
 
}}
  
|sock = {{#if:{{{sock1|}}}{{{sock2|}}}{{{sock3|}}}{{{sock4|}}}{{{sock5|}}}{{{sock6|}}}{{{sock7|}}}{{{sock8|}}}|{{plainlist|<!--
+
|sock = {{safesubst<noinclude />:#if:{{{sock1|}}}{{{sock2|}}}{{{sock3|}}}{{{sock4|}}}{{{sock5|}}}{{{sock6|}}}{{{sock7|}}}{{{sock8|}}}|{{plainlist|<!--
   -->{{#if:{{{sock1|}}}|* {{{sock1}}} }}<!-- when sock1...sock8 are specified show sock1...sock8 and sock
+
   -->{{safesubst<noinclude />:#if:{{{sock1|}}}|* {{{sock1}}} }}<!-- when sock1...sock8 are specified show sock1...sock8 and sock
   -->{{#if:{{{sock2|}}}|* {{{sock2}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock2|}}}|* {{{sock2}}} }}<!--
   -->{{#if:{{{sock3|}}}|* {{{sock3}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock3|}}}|* {{{sock3}}} }}<!--
   -->{{#if:{{{sock4|}}}|* {{{sock4}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock4|}}}|* {{{sock4}}} }}<!--
   -->{{#if:{{{sock5|}}}|* {{{sock5}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock5|}}}|* {{{sock5}}} }}<!--
   -->{{#if:{{{sock6|}}}|* {{{sock6}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock6|}}}|* {{{sock6}}} }}<!--
   -->{{#if:{{{sock7|}}}|* {{{sock7}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock7|}}}|* {{{sock7}}} }}<!--
   -->{{#if:{{{sock8|}}}|* {{{sock8}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{sock8|}}}|* {{{sock8}}} }}<!--
   -->{{#if:{{{sock|}}}|{{{sock}}}}}<!--  otherwise, take a guess with just sock
+
   -->{{safesubst<noinclude />:#if:{{{sock|}}}|{{{sock}}}}}<!--  otherwise, take a guess with just sock
   -->}} |{{#switch: {{{2}}}
+
   -->}} |{{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = [[CPU socket|Socket]]
 
  | end | head = [[CPU socket|Socket]]
  | haswell =  {{#switch: {{{sock}}}
+
  | haswell =  {{safesubst<noinclude />:#switch: {{{sock}}}
 
                   |bga | BGA | FC-BGA10
 
                   |bga | BGA | FC-BGA10
                   | 1364 = {{#if: {{{links|}}}|[[BGA-1364]]|BGA-1364}}
+
                   | 1364 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA-1364]]|BGA-1364}}
                   | 1168 = {{#if: {{{links|}}}|[[BGA-1168]]|BGA-1168}}
+
                   | 1168 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA-1168]]|BGA-1168}}
                   | 1234 = {{#if: {{{links|}}}|[[BGA-1234]]|BGA-1234}}
+
                   | 1234 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA-1234]]|BGA-1234}}
 
                   |pga |PGA |PGA946 |PGA946B
 
                   |pga |PGA |PGA946 |PGA946B
                   | 946 |946B = {{#if: {{{links|}}}|[[Intel Socket G3|Socket G3]]|Socket G3}}
+
                   | 946 |946B = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Socket G3|Socket G3]]|Socket G3}}
                   | {{{sock|{{#if: {{{links|}}}|[[Intel Socket G3|Socket G3]]|Socket G3}}}}}
+
                   | {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Socket G3|Socket G3]]|Socket G3}}}}}
                   | 1150 = {{#if: {{{links|}}}|[[LGA 1150]]|LGA 1150}}
+
                   | 1150 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1150]]|LGA 1150}}
 
                   }}
 
                   }}
  | skylake =  {{#switch: {{{sock}}}
+
  | skylake =  {{safesubst<noinclude />:#switch: {{{sock}}}
 
                   |bga | BGA | FC-BGA10
 
                   |bga | BGA | FC-BGA10
                   | 2270 = {{#if: {{{links|}}}|[[BGA 2270]]|BGA 2270}}
+
                   | 2270 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 2270]]|BGA 2270}}
                   | 1528 = {{#if: {{{links|}}}|[[BGA 1528]]|BGA 1528}}
+
                   | 1528 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1528]]|BGA 1528}}
                   | 1515 = {{#if: {{{links|}}}|[[BGA 1515]]|BGA 1515}}
+
                   | 1515 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1515]]|BGA 1515}}
                   | 1440 = {{#if: {{{links|}}}|[[BGA 1440]]|BGA 1440}}
+
                   | 1440 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1440]]|BGA 1440}}
                   | 1356 |1356B = {{#if: {{{links|}}}|[[BGA 1356]]|BGA 1356}}
+
                   | 1356 |1356B = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1356]]|BGA 1356}}
                   | 1151 = {{#if: {{{links|}}}|[[LGA 1151]]|LGA 1151}}
+
                   | 1151 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1151]]|LGA 1151}}
                   | 1151v2 = {{#if: {{{links|}}}|[[LGA 1151v2]]|LGA 1151v2}}
+
                   | 1151v2 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1151v2]]|LGA 1151v2}}
            | 2066 = {{#if: {{{links|}}}|[[LGA 2066]]|LGA 2066}}
+
            | 2066 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 2066]]|LGA 2066}}
            | 3647 = {{#if: {{{links|}}}|[[LGA 3647]]|LGA 3647}}
+
            | 3647 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 3647]]|LGA 3647}}
 
                   }}
 
                   }}
 
  | gainestown
 
  | gainestown
Line 505: Line 505:
 
  | gulftownup
 
  | gulftownup
 
  | bloomfield
 
  | bloomfield
  | jasperforest = {{#if: {{{links|}}}|[[LGA 1366]]|LGA 1366}}
+
  | jasperforest = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1366]]|LGA 1366}}
  | beckton    = {{#if: {{{links|}}}|[[LGA 1567]]|LGA 1567}}
+
  | beckton    = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1567]]|LGA 1567}}
 
  | lynnfield
 
  | lynnfield
  | clarkdale  = {{#if: {{{links|}}}|[[LGA 1156]]|LGA 1156}}
+
  | clarkdale  = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1156]]|LGA 1156}}
 
  | arrandale
 
  | arrandale
  | clarksfield =  {{#switch: {{{sock}}}
+
  | clarksfield =  {{safesubst<noinclude />:#switch: {{{sock}}}
 
                   |bga | BGA | FC-BGA10
 
                   |bga | BGA | FC-BGA10
                   | 1288 = {{#if: {{{links|}}}|[[BGA-1288]]|BGA-1288}}
+
                   | 1288 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA-1288]]|BGA-1288}}
 
                   |pga |PGA |PGA988 |PGA988A
 
                   |pga |PGA |PGA988 |PGA988A
                   | 988 |988A = {{#if: {{{links|}}}|[[Socket G1]]|Socket G1}}
+
                   | 988 |988A = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket G1]]|Socket G1}}
                   | {{{sock|{{#if: {{{links|}}}|[[Socket G1]]|Socket G1}}}}}
+
                   | {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[Socket G1]]|Socket G1}}}}}
 
                   }}
 
                   }}
 
  | dothan
 
  | dothan
  | banias = {{{sock|{{#if: {{{links|}}}|[[Socket 479]]|Socket 479}} }}}
+
  | banias = {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 479]]|Socket 479}} }}}
 
  | sossaman
 
  | sossaman
 
  | yonah
 
  | yonah
  | merom = {{{sock|{{#if: {{{links|}}}|[[Socket M]]|Socket M}} }}}
+
  | merom = {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[Socket M]]|Socket M}} }}}
  | penryn = {{{sock|{{#if: {{{links|}}}|[[Socket P]]|Socket P}} }}}
+
  | penryn = {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[Socket P]]|Socket P}} }}}
  | penrynulv = {{{sock|{{#if: {{{links|}}}|[[μFC-BGA 956]]|μFC-BGA 956}} }}}
+
  | penrynulv = {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[μFC-BGA 956]]|μFC-BGA 956}} }}}
 
  | silverthorne
 
  | silverthorne
  | diamondville = {{#ifeq: {{{sock|}}}|441|
+
  | diamondville = {{safesubst<noinclude />:#ifeq: {{{sock|}}}|441|
         {{#if: {{{links|}}}|[[BGA 441]]|BGA 441}}|
+
         {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 441]]|BGA 441}}|
         {{#if: {{{links|}}}|[[BGA 437]]|BGA 437}} }}
+
         {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 437]]|BGA 437}} }}
 
  | pineview
 
  | pineview
  | lincroft = {{#if: {{{links|}}}|[[FC-BGA 518]]|FC-BGA 518}}
+
  | lincroft = {{safesubst<noinclude />:#if: {{{links|}}}|[[FC-BGA 518]]|FC-BGA 518}}
  | tunnelcreek = {{#if: {{{links|}}}|[[FC-BGA 676]]|FC-BGA 676}}
+
  | tunnelcreek = {{safesubst<noinclude />:#if: {{{links|}}}|[[FC-BGA 676]]|FC-BGA 676}}
 
  | tigerton
 
  | tigerton
  | dunnington = {{#if: {{{links|}}}|[[Socket 604]]|Socket 604}}
+
  | dunnington = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 604]]|Socket 604}}
 
  | woodcrest
 
  | woodcrest
 
  | clovertown
 
  | clovertown
  | harpertown = {{{sock|{{#if: {{{links|}}}|[[LGA 771]]|LGA 771}} }}}
+
  | harpertown = {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 771]]|LGA 771}} }}}
 
  | wolfdale
 
  | wolfdale
 
  |  conroe
 
  |  conroe
 
  |  yorkfield
 
  |  yorkfield
  |  kentsfield  =  {{{sock|{{#if: {{{links|}}}|[[LGA 775]]|LGA 775}} }}}
+
  |  kentsfield  =  {{{sock|{{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 775]]|LGA 775}} }}}
  | {{#switch: {{{sock}}}
+
  | {{safesubst<noinclude />:#switch: {{{sock}}}
  | 2066 = {{#if: {{{links|}}}|[[LGA 2066]]|LGA 2066}}
+
  | 2066 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 2066]]|LGA 2066}}
  | 3647 = {{#if: {{{links|}}}|[[LGA 3647]]|LGA 3647}}
+
  | 3647 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 3647]]|LGA 3647}}
   | 5903 = {{#if: {{{links|}}}|[[BGA 5903]]|BGA 5903}}  
+
   | 5903 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 5903]]|BGA 5903}}  
   | 2011-3 = {{#if: {{{links|}}}|[[LGA 2011-3]]|LGA 2011-3}}
+
   | 2011-3 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 2011-3]]|LGA 2011-3}}
   | 2011-1 = {{#if: {{{links|}}}|[[LGA 2011-1]]|LGA 2011-1}}
+
   | 2011-1 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 2011-1]]|LGA 2011-1}}
   | 2011 = {{#if: {{{links|}}}|[[LGA 2011]]|LGA 2011}}
+
   | 2011 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 2011]]|LGA 2011}}
   | 1366 = {{#if: {{{links|}}}|[[LGA 1366]]|LGA 1366}}
+
   | 1366 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1366]]|LGA 1366}}
   | 1364 = {{#if: {{{links|}}}|[[BGA 1364]]|BGA 1364}}
+
   | 1364 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1364]]|BGA 1364}}
   | 1356-3 = {{#if: {{{links|}}}|[[LGA 1356-3]]|LGA 1356-3}}
+
   | 1356-3 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1356-3]]|LGA 1356-3}}
   | 1356 = {{#if: {{{links|}}}|[[LGA 1356]]|LGA 1356}}
+
   | 1356 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1356]]|LGA 1356}}
   | 1288 = {{#if: {{{links|}}}|[[BGA 1288]]|LGA 1288}}
+
   | 1288 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1288]]|LGA 1288}}
   | 1284 = {{#if: {{{links|}}}|[[BGA 1284]]|BGA 1284}}
+
   | 1284 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1284]]|BGA 1284}}
   | 1234 = {{#if: {{{links|}}}|[[BGA 1234]]|BGA 1234}}
+
   | 1234 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1234]]|BGA 1234}}
   | 1168 = {{#if: {{{links|}}}|[[BGA 1168]]|BGA 1168}}
+
   | 1168 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1168]]|BGA 1168}}
 
   | 1152
 
   | 1152
   | 1156 = {{#if: {{{links|}}}|[[LGA 1156]]|LGA 1156}}
+
   | 1156 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1156]]|LGA 1156}}
   | 1155 = {{#if: {{{links|}}}|[[LGA 1155]]|LGA 1155}}
+
   | 1155 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1155]]|LGA 1155}}
   | 1150 = {{#if: {{{links|}}}|[[LGA 1150]]|LGA 1150}}
+
   | 1150 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1150]]|LGA 1150}}
   | 1151 = {{#if: {{{links|}}}|[[LGA 1151]]|LGA 1151}}
+
   | 1151 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1151]]|LGA 1151}}
   | 1151v2 = {{#if: {{{links|}}}|[[LGA 1151v2]]|LGA 1151v2}}
+
   | 1151v2 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 1151v2]]|LGA 1151v2}}
   | 1023 = {{#if: {{{links|}}}|[[BGA 1023]]|BGA 1023}}
+
   | 1023 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 1023]]|BGA 1023}}
   | 988A = {{#if: {{{links|}}}|[[Socket G1]]|Socket G1}}
+
   | 988A = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket G1]]|Socket G1}}
   | 988B = {{#if: {{{links|}}}|[[Socket G2]]|Socket G2}}
+
   | 988B = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket G2]]|Socket G2}}
   | 956 = {{#if: {{{links|}}}|[[μFC-BGA 956]]|μFC-BGA 956}}
+
   | 956 = {{safesubst<noinclude />:#if: {{{links|}}}|[[μFC-BGA 956]]|μFC-BGA 956}}
   | 946B = {{#if: {{{links|}}}|[[Socket G3]]|Socket G3}}
+
   | 946B = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket G3]]|Socket G3}}
 
   | Socket J
 
   | Socket J
 
   | J
 
   | J
   | 775 = {{#if: {{{links|}}}|[[LGA 775]]|LGA 775}}
+
   | 775 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 775]]|LGA 775}}
   | 771 = {{#if: {{{links|}}}|[[LGA 771]]|LGA 771}}
+
   | 771 = {{safesubst<noinclude />:#if: {{{links|}}}|[[LGA 771]]|LGA 771}}
   | 604 = {{#if: {{{links|}}}|[[Socket 604]]|Socket 604}}
+
   | 604 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 604]]|Socket 604}}
   | 603 = {{#if: {{{links|}}}|[[Socket 603]]|Socket 603}}
+
   | 603 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 603]]|Socket 603}}
   | 559 = {{#if: {{{links|}}}|[[micro-FCBGA8 559]]|micro-FCBGA8 559}}
+
   | 559 = {{safesubst<noinclude />:#if: {{{links|}}}|[[micro-FCBGA8 559]]|micro-FCBGA8 559}}
   | 462 = {{#if: {{{links|}}}|[[Socket 462]]|Socket 462}}
+
   | 462 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 462]]|Socket 462}}
 
   | N
 
   | N
   | 478 = {{#if: {{{links|}}}|[[Socket 478]]|Socket 478}}
+
   | 478 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 478]]|Socket 478}}
   | 479 = {{#if: {{{links|}}}|[[Socket 479]]|Socket 479}}
+
   | 479 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 479]]|Socket 479}}
   | 441 = {{#if: {{{links|}}}|[[BGA 441]]|BGA 441}}
+
   | 441 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 441]]|BGA 441}}
   | 437 = {{#if: {{{links|}}}|[[BGA 437]]|BGA 437}}
+
   | 437 = {{safesubst<noinclude />:#if: {{{links|}}}|[[BGA 437]]|BGA 437}}
   | 423 = {{#if: {{{links|}}}|[[Socket 423]]|Socket 423}}
+
   | 423 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 423]]|Socket 423}}
   | 370 = {{#if: {{{links|}}}|[[Socket 370]]|Socket 370}}
+
   | 370 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 370]]|Socket 370}}
   | 4 = {{#if: {{{links|}}}|[[Socket 4]]|Socket 4}}
+
   | 4 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 4]]|Socket 4}}
   | 5 = {{#if: {{{links|}}}|[[Socket 5]]|Socket 5}}
+
   | 5 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 5]]|Socket 5}}
   | 6 = {{#if: {{{links|}}}|[[Socket 6]]|Socket 6}}
+
   | 6 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 6]]|Socket 6}}
   | 7 = {{#if: {{{links|}}}|[[Socket 7]]|Socket 7}}
+
   | 7 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket 7]]|Socket 7}}
   | M = {{#if: {{{links|}}}|[[Socket M]]|Socket M}}
+
   | M = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket M]]|Socket M}}
   | P = {{#if: {{{links|}}}|[[Socket P]]|Socket P}}
+
   | P = {{safesubst<noinclude />:#if: {{{links|}}}|[[Socket P]]|Socket P}}
   | A = {{#if: {{{links|}}}|[[Slot A]]|Slot A}}
+
   | A = {{safesubst<noinclude />:#if: {{{links|}}}|[[Slot A]]|Slot A}}
   | B = {{#if: {{{links|}}}|[[Slot B]]|Slot B}}
+
   | B = {{safesubst<noinclude />:#if: {{{links|}}}|[[Slot B]]|Slot B}}
   | 2 = {{#if: {{{links|}}}|[[Slot 2]]|Slot 2}}
+
   | 2 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Slot 2]]|Slot 2}}
 
   |  
 
   |  
 
  }}
 
  }}
Line 595: Line 595:
 
}}
 
}}
  
|gfxmodel = {{#switch: {{{2}}}
+
|gfxmodel = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = GPU<br>model
 
  | end | head = GPU<br>model
  | sandybridge|ivybridge|haswell|baytrail|skylake = {{#switch: {{{gfxmodel}}}
+
  | sandybridge|ivybridge|haswell|baytrail|skylake = {{safesubst<noinclude />:#switch: {{{gfxmodel}}}
   |4eu = {{#if: {{{links|}}}|[[Intel Graphics Technology]] (4&nbsp;EUs)|HD Graphics (4&nbsp;EUs)}}
+
   |4eu = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Graphics Technology]] (4&nbsp;EUs)|HD Graphics (4&nbsp;EUs)}}
   |6eu = {{#if: {{{links|}}}|[[Intel Graphics Technology]] (6&nbsp;EUs)|HD Graphics (6&nbsp;EUs)}}
+
   |6eu = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Graphics Technology]] (6&nbsp;EUs)|HD Graphics (6&nbsp;EUs)}}
   |10eu = {{#if: {{{links|}}}|[[Intel Graphics Technology]] (10&nbsp;EUs)|HD Graphics (10&nbsp;EUs)}}
+
   |10eu = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Graphics Technology]] (10&nbsp;EUs)|HD Graphics (10&nbsp;EUs)}}
   |12eu = {{#if: {{{links|}}}|[[Intel Graphics Technology]] (12&nbsp;EUs)|HD Graphics (12&nbsp;EUs)}}
+
   |12eu = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Graphics Technology]] (12&nbsp;EUs)|HD Graphics (12&nbsp;EUs)}}
   |16eu = {{#if: {{{links|}}}|[[Intel Graphics Technology]] (16&nbsp;EUs)|HD Graphics (16&nbsp;EUs)}}
+
   |16eu = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel Graphics Technology]] (16&nbsp;EUs)|HD Graphics (16&nbsp;EUs)}}
 
   |gt1
 
   |gt1
 
   |GT1
 
   |GT1
 
   |1
 
   |1
   |2000 = {{#if: {{{links|}}}|[[HD Graphics 2000]]|HD Graphics 2000}}
+
   |2000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 2000]]|HD Graphics 2000}}
 
   |gt2
 
   |gt2
 
   |GT2
 
   |GT2
 
   |2
 
   |2
   |3000 = {{#if: {{{links|}}}|[[HD Graphics 3000]]|HD Graphics 3000}}
+
   |3000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 3000]]|HD Graphics 3000}}
 
   |p3000
 
   |p3000
 
   |P3000
 
   |P3000
   |P = {{#if: {{{links|}}}|[[HD Graphics P3000]]|HD Graphics P3000}}
+
   |P = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics P3000]]|HD Graphics P3000}}
   |2500 = {{#if: {{{links|}}}|[[HD Graphics 2500]]|HD Graphics 2500}}
+
   |2500 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 2500]]|HD Graphics 2500}}
   |4000 = {{#if: {{{links|}}}|[[HD Graphics 4000]]|HD Graphics 4000}}
+
   |4000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 4000]]|HD Graphics 4000}}
   |P4000 = {{#if: {{{links|}}}|[[HD Graphics P4000]]|HD Graphics P4000}}
+
   |P4000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics P4000]]|HD Graphics P4000}}
   |4200 = {{#if: {{{links|}}}|[[HD Graphics 4200]]|HD Graphics 4200}}
+
   |4200 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 4200]]|HD Graphics 4200}}
   |4400 = {{#if: {{{links|}}}|[[HD Graphics 4400]]|HD Graphics 4400}}
+
   |4400 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 4400]]|HD Graphics 4400}}
   |4600 = {{#if: {{{links|}}}|[[HD Graphics 4600]]|HD Graphics 4600}}
+
   |4600 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 4600]]|HD Graphics 4600}}
   |P4600 = {{#if: {{{links|}}}|[[HD Graphics P4600]]|HD Graphics P4600}}
+
   |P4600 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics P4600]]|HD Graphics P4600}}
   |P4700 = {{#if: {{{links|}}}|[[HD Graphics P4700]]|HD Graphics P4700}}
+
   |P4700 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics P4700]]|HD Graphics P4700}}
   |5000 = {{#if: {{{links|}}}|[[HD Graphics 5000]]|HD Graphics 5000}}
+
   |5000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 5000]]|HD Graphics 5000}}
   |5100 = {{#if: {{{links|}}}|[[Iris Graphics 5100]]|Iris Graphics 5100}}
+
   |5100 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Iris Graphics 5100]]|Iris Graphics 5100}}
   |5200 = {{#if: {{{links|}}}|[[Iris Pro Graphics 5200]]|Iris Pro Graphics 5200}}
+
   |5200 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Iris Pro Graphics 5200]]|Iris Pro Graphics 5200}}
   |5300 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 5300]]|HD Graphics 5300}}
+
   |5300 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 5300]]|HD Graphics 5300}}
   |5500 = {{#if: {{{links|}}}|[[HD Graphics 5500]]|HD Graphics 5500}}
+
   |5500 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 5500]]|HD Graphics 5500}}
   |5600 = {{#if: {{{links|}}}|[[HD Graphics 5600]]|HD Graphics 5600}}
+
   |5600 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 5600]]|HD Graphics 5600}}
   |P5700 = {{#if: {{{links|}}}|[[HD Graphics P5700]]|HD Graphics P5700}}
+
   |P5700 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics P5700]]|HD Graphics P5700}}
   |6000 = {{#if: {{{links|}}}|[[HD Graphics 6000]]|HD Graphics 6000}}
+
   |6000 = {{safesubst<noinclude />:#if: {{{links|}}}|[[HD Graphics 6000]]|HD Graphics 6000}}
   |6100 = {{#if: {{{links|}}}|[[Iris Graphics 6100]]|Iris Graphics 6100}}
+
   |6100 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Iris Graphics 6100]]|Iris Graphics 6100}}
   |6200 = {{#if: {{{links|}}}|[[Iris Pro Graphics 6200]]|Iris Pro Graphics 6200}}
+
   |6200 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Iris Pro Graphics 6200]]|Iris Pro Graphics 6200}}
   |P6300 = {{#if: {{{links|}}}|[[Iris Pro Graphics P6300]]|Iris Pro Graphics P6300}}
+
   |P6300 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Iris Pro Graphics P6300]]|Iris Pro Graphics P6300}}
   |400 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 400]]|HD Graphics 400}}
+
   |400 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 400]]|HD Graphics 400}}
   |405 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 405]]|HD Graphics 405}}
+
   |405 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 405]]|HD Graphics 405}}
   |500 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 500]]|HD Graphics 500}}
+
   |500 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 500]]|HD Graphics 500}}
   |505 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 505]]|HD Graphics 505}}
+
   |505 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 505]]|HD Graphics 505}}
   |510 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 510]]|HD Graphics 510}}
+
   |510 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 510]]|HD Graphics 510}}
   |515 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 515]]|HD Graphics 515}}
+
   |515 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 515]]|HD Graphics 515}}
   |520 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 520]]|HD Graphics 520}}
+
   |520 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 520]]|HD Graphics 520}}
   |530 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 530]]|HD Graphics 530}}
+
   |530 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 530]]|HD Graphics 530}}
   |P530 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics P530]]|HD Graphics P530}}
+
   |P530 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics P530]]|HD Graphics P530}}
   |535 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 535]]|HD Graphics 535}}
+
   |535 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 535]]|HD Graphics 535}}
   |540 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Graphics 540]]|Iris Graphics 540}}
+
   |540 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Graphics 540]]|Iris Graphics 540}}
   |550 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Graphics 550]]|Iris Graphics 550}}
+
   |550 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Graphics 550]]|Iris Graphics 550}}
   |P555 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics P555]]|Iris Pro Graphics P555}}
+
   |P555 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics P555]]|Iris Pro Graphics P555}}
   |580 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics 580]]|Iris Pro Graphics 580}}
+
   |580 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics 580]]|Iris Pro Graphics 580}}
   |P580 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics P580]]|Iris Pro Graphics P580}}
+
   |P580 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Pro Graphics P580]]|Iris Pro Graphics P580}}
   |600 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 600]]|UHD Graphics 600}}
+
   |600 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 600]]|UHD Graphics 600}}
   |605 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 605]]|UHD Graphics 605}}
+
   |605 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 605]]|UHD Graphics 605}}
   |610 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 610]]|HD Graphics 610}}
+
   |610 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 610]]|HD Graphics 610}}
   |U610= {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 610]]|UHD Graphics 610}}
+
   |U610= {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 610]]|UHD Graphics 610}}
   |615 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 615]]|HD Graphics 615}}
+
   |615 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 615]]|HD Graphics 615}}
   |620 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 620]]|HD Graphics 620}}
+
   |620 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 620]]|HD Graphics 620}}
   |U620= {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 620]]|UHD Graphics 620}}
+
   |U620= {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 620]]|UHD Graphics 620}}
   |630 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 630]]|HD Graphics 630}}
+
   |630 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics 630]]|HD Graphics 630}}
   |P630 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics P630]]|HD Graphics P630}}
+
   |P630 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|HD Graphics P630]]|HD Graphics P630}}
   |U630= {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 630]]|UHD Graphics 630}}
+
   |U630= {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|UHD Graphics 630]]|UHD Graphics 630}}
   |640 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 640]]|Iris Plus Graphics 640}}
+
   |640 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 640]]|Iris Plus Graphics 640}}
   |650 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 650]]|Iris Plus Graphics 650}}
+
   |650 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 650]]|Iris Plus Graphics 650}}
   |655 = {{#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 655]]|Iris Plus Graphics 655}}
+
   |655 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Intel HD and Iris Graphics|Iris Plus Graphics 655]]|Iris Plus Graphics 655}}
   |630Vega20= {{#if: {{{links|}}}|[[Radeon RX Vega M GL Graphics]]|HD Graphics 630<br>Radeon RX Vega M GL Graphics}}
+
   |630Vega20= {{safesubst<noinclude />:#if: {{{links|}}}|[[Radeon RX Vega M GL Graphics]]|HD Graphics 630<br>Radeon RX Vega M GL Graphics}}
   |630Vega24 = {{#if: {{{links|}}}|[[Radeon RX Vega M GH Graphics]]|HD Graphics 630<br>Radeon RX Vega M GH Graphics}}
+
   |630Vega24 = {{safesubst<noinclude />:#if: {{{links|}}}|[[Radeon RX Vega M GH Graphics]]|HD Graphics 630<br>Radeon RX Vega M GH Graphics}}
   | {{#if: {{{gfxmodel|}}}|{{{gfxmodel|}}} (?)|{{N/a}} }}
+
   | {{safesubst<noinclude />:#if: {{{gfxmodel|}}}|{{{gfxmodel|}}} (?)|{{N/a}} }}
 
  }}
 
  }}
 
  | {{{gfxmodel|{{N/a}} }}}
 
  | {{{gfxmodel|{{N/a}} }}}
 
}}
 
}}
  
|date = {{#switch: {{{2}}}
+
|date = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Release date
 
  | end | head = Release date
 
  | {{{date|}}}
 
  | {{{date|}}}
 
}}
 
}}
  
|part = {{#switch: {{{2}}}
+
|part = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Part<br>number(s)
 
  | end | head = Part<br>number(s)
  | {{#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part5|}}}{{{part6|}}}{{{part7|}}}{{{part8|}}}{{{part|}}}|{{plainlist|<!--
+
  | {{safesubst<noinclude />:#if:{{{part1|}}}{{{part2|}}}{{{part3|}}}{{{part4|}}}{{{part5|}}}{{{part6|}}}{{{part7|}}}{{{part8|}}}{{{part|}}}|{{plainlist|<!--
   -->{{#if:{{{part1|}}}|* {{{part1}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part1|}}}|* {{{part1}}} }}<!--
   -->{{#if:{{{part2|}}}|* {{{part2}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part2|}}}|* {{{part2}}} }}<!--
   -->{{#if:{{{part3|}}}|* {{{part3}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part3|}}}|* {{{part3}}} }}<!--
   -->{{#if:{{{part4|}}}|* {{{part4}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part4|}}}|* {{{part4}}} }}<!--
   -->{{#if:{{{part5|}}}|* {{{part5}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part5|}}}|* {{{part5}}} }}<!--
   -->{{#if:{{{part6|}}}|* {{{part6}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part6|}}}|* {{{part6}}} }}<!--
   -->{{#if:{{{part7|}}}|* {{{part7}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part7|}}}|* {{{part7}}} }}<!--
   -->{{#if:{{{part8|}}}|* {{{part8}}} }}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part8|}}}|* {{{part8}}} }}<!--
   -->{{#if:{{{part|}}}|{{{part}}}}}<!--
+
   -->{{safesubst<noinclude />:#if:{{{part|}}}|{{{part}}}}}<!--
 
   -->}} }}
 
   -->}} }}
 
}}
 
}}
  
|price = {{#switch: {{{2}}}
+
|price = {{safesubst<noinclude />:#switch: {{{2}}}
 
  | end | head = Release<br>price ([[United States dollar|USD]])
 
  | end | head = Release<br>price ([[United States dollar|USD]])
 
  | {{{price|}}}
 
  | {{{price|}}}
Line 694: Line 694:
  
 
}}
 
}}
{{#ifeq:{{{2}}}|end|{{!)}}}}<!--
+
{{safesubst<noinclude />:#ifeq:{{{2}}}|end|{{!)}}}}<!--
 
--></includeonly><noinclude>
 
--></includeonly><noinclude>
 
{{documentation}}
 
{{documentation}}
 
[[Category:Lists of microprocessors|*]]
 
[[Category:Lists of microprocessors|*]]
 
</noinclude>
 
</noinclude>

Revision as of 14:20, 31 May 2019

Template documentation[view] [edit] [history] [purge]

cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.

As a simple example,

 {{cpulist|nehalem|head}}
 {{cpulist|nehalem|gainestown|model=Xeon E5502
 |l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
   |sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
 {{cpulist|nehalem|end}}

results in a table like

Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)
Xeon E5502
  • SLBEZ (D0)
1.87 GHz N/A 4 4 × 256 KiB 4 MiB 2 × 4.8 GT/s QPI 14× 3 × DDR3-800 0.75–1.35 V
80 W
LGA 1366 March 30, 2009
  • AT80602000804AA
$188
Model
number
sSpec
number
Frequency Turbo Cores L2
cache
L3
cache
I/O bus Mult. Memory Voltage TDP Socket Release date Part
number(s)
Release
price (USD)

Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.

Here is the list of cpulist sub-templates:

Template arguments

The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are

  • lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
  • skylake For lists of the Skylake, Kabylake, Coffeelake, etc generation of processors, including GPU field
  • silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
  • haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
  • bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
  • sandybridge: For lists of the previous Sandy Bridge processors, currently same format as bridge
  • nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
  • nehgfx: like nehalem, but for chips with integrated graphics capability
  • atom: For lists of low-end Atom processors, currently same format as core
  • atomx3: For lists of Atom processors
  • atomgfx: For lists of Atom processors with integrated graphics
  • core: For lists of Intel's previous generation of processors
  • p6: For lists of Intel's p6 generation of processors
  • p5: For lists of Intel's p5 generation of processors

The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently:

Other arguments are

  • |anchor=: An arbitrary HTML anchor that can be assigned to an entry
  • |model=: The name of the processor
  • |sspec= or |sspec1=|sspec8=: up to 8 Intel sSpec numbers
    • |step1=|step8=: up to 8 stepping names for the above sSpec numbers
  • |freq=: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHz
  • |uncore=: Uncore frequency, in MHz or GHz
  • |turbo=: Turbo frequencies , as increments in clock multiplier
  • |burst=: Burst frequencies , in GHz
  • |igp=: Model of integrated graphics processor
  • |gfxfreq=: clock frequency of the integrated graphics, if applicable
  • |cores=: number of processor cores
    • |threads=: number of processor threads
  • |l1=: size of the Level 1 Cache, in KB
  • |l2=: size of the Level 2 Cache, in KB or MB
  • |l3=: size of the Level 3 Cache, in MB
  • |iobus=: Type and speed of I/O bus interface, may be expressed as one of
    • |fsb=: performance of Front-side bus in MT/s, if applicable
    • |ht=: performance of Hypertransport in MT/s, if applicable
    • |qpi=: performance of Quickpath interface in MT/s, if applicable
    • |dmi=: set to 1 if Direct media interface is in use
  • |mult=: clock multiplier of fsb or base frequency
  • |mem=: memory interface of integrated memory controller, may be expressed as
    • |memspeed=: data rate of integrated memory controller
  • |volt=: core voltage range, usually given as
    • |vmin=: minimum voltage in volts
    • |vmax=: maximum voltage (optional) in volts
  • |tdp= or |tdp1=|tdp8=: Thermal design power in watts
  • |sdp=: Scenario design power in watts
  • |sock= or |sock1=|sock8=: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some others
  • |date=: release date
  • |part= or |part1=|part8=: part numbers
  • |price=: price in USD at the time of release

A special argument is

  • |links=: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table