Difference between revisions of "Template:Intel CPU sockets"
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| Line 4: | Line 4: | ||
| listclass = hlist | | listclass = hlist | ||
|group1=Desktop sockets | |group1=Desktop sockets | ||
| + | |list1={{Navbox subgroup | ||
| + | |||
| + | |group1=Slot | ||
|list1= | |list1= | ||
*[[Slot 1]] | *[[Slot 1]] | ||
| − | + | ||
| − | + | |group2=[[Pin grid array|PGA]] | |
| − | + | |list2= | |
| − | + | *[[Socket 370|370]] | |
| − | + | *[[Socket 423|423 (W)]] | |
| − | + | *[[Socket 478|478 (N)]] | |
| − | + | ||
| − | + | |group3=[[Land grid array|LGA]] | |
| − | + | |list3= | |
| − | + | *[[LGA 775|775 (T)]] | |
| − | + | *[[LGA 1366|1366 (B)]] | |
| − | + | *[[LGA 1156|1156 (H1)]] | |
| + | *[[LGA 1155|1155 (H2)]] | ||
| + | *[[LGA 1150|1150 (H3)]] | ||
| + | *[[LGA 2011|2011 (R)]] | ||
| + | *[[LGA 1151|1151]] | ||
| + | |||
| + | }} | ||
|group2=Mobile sockets | |group2=Mobile sockets | ||
| Line 30: | Line 39: | ||
|group3=Server sockets | |group3=Server sockets | ||
| + | |list3={{Navbox subgroup | ||
| + | |||
| + | |group1= | ||
| + | |list1= | ||
| + | *[[Socket 8]] | ||
| + | |||
| + | |group2=[[Xeon]] processors | ||
| + | |list2={{Navbox subgroup | ||
| + | |||
| + | |group1=Slot | ||
| + | |list1= | ||
| + | *[[Slot 2]] | ||
| + | |||
| + | |group2=[[Pin grid array|PGA]] | ||
| + | |list2= | ||
| + | *[[Socket 603|603]] | ||
| + | *[[Socket 604|604]] | ||
| + | |||
| + | |group3=[[Land grid array|LGA]] | ||
|list3= | |list3= | ||
| − | + | *[[LGA 771|771 (J)]] | |
| − | + | *[[LGA 1366|1366 (B)]] | |
| − | + | *[[LGA 1156|1156 (H1)]] | |
| − | + | *[[LGA 1567|1567 (LS)]] | |
| − | + | *[[LGA 1155|1155 (H2)]] | |
| − | + | *[[LGA 2011|2011 (R)]] | |
| − | + | *[[LGA 1356|1356 (B2)]] | |
| − | + | *[[LGA 1150|1150 (H3)]] | |
| − | + | ||
| − | + | }} | |
| − | + | ||
| − | + | |group3=[[Intel Itanium|Itanium]] processors | |
| − | + | |list3= | |
| − | + | *[[PAC418|418]] | |
| − | + | *[[PAC611|611]] | |
| − | + | *[[LGA 1248|1248]] | |
| − | |||
| − | |||
| − | |||
| + | }} | ||
|group4=Pre-[[Pentium II]] [[Pin grid array|PGA Sockets]] | |group4=Pre-[[Pentium II]] [[Pin grid array|PGA Sockets]] | ||
| Line 62: | Line 88: | ||
*[[Socket 7]] | *[[Socket 7]] | ||
*[[Super Socket 7]] | *[[Super Socket 7]] | ||
| + | |||
}}<noinclude>{{Documentation|content= | }}<noinclude>{{Documentation|content= | ||
Revision as of 15:59, 15 January 2014
See also
- {{Intel technology}}
- {{Intel software}}
- {{Intel processors}}
- {{Intel processor roadmap}}
- {{Intel controllers}}
- {{Early CPU sockets}}
- {{AMD CPU sockets}}
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