Difference between revisions of "Template:Intel CPU sockets"
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imported>Artem S. Tashkinov (+LGA 1700) |
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| Line 27: | Line 27: | ||
*[[LGA 1151|1151]] (H4 2015–2019) | *[[LGA 1151|1151]] (H4 2015–2019) | ||
*[[LGA 2066|2066]] (R4 2017) | *[[LGA 2066|2066]] (R4 2017) | ||
| − | *[[LGA 1200|1200]] ( | + | *[[LGA 1200|1200]] (2020) |
*[[LGA 1700|1700]] (?) | *[[LGA 1700|1700]] (?) | ||
}} | }} | ||
| Line 49: | Line 49: | ||
|group1= | |group1= | ||
|list1= | |list1= | ||
| − | *[[Socket 8]] | + | *[[Socket 8]] (1995) |
|group2=[[Xeon]] processors | |group2=[[Xeon]] processors | ||
| Line 56: | Line 56: | ||
|group1=[[Edge connector|Slot]] | |group1=[[Edge connector|Slot]] | ||
|list1= | |list1= | ||
| − | *[[Slot 2]] | + | *[[Slot 2]] (1998-2000) |
|group2=[[Pin grid array|PGA]] | |group2=[[Pin grid array|PGA]] | ||
|list2= | |list2= | ||
| − | *[[Socket 603|603]] | + | *[[Socket 603|603]] (2001-2004) |
| − | *[[Socket 604|604]] | + | *[[Socket 604|604]] (2002-2007) |
|group3=[[Land grid array|LGA]] | |group3=[[Land grid array|LGA]] | ||
| Line 77: | Line 77: | ||
*[[LGA 1151|1151]] (H4 2015) | *[[LGA 1151|1151]] (H4 2015) | ||
*[[LGA 3647|3647]] (P 2016) | *[[LGA 3647|3647]] (P 2016) | ||
| − | *2066 | + | *[[LGA 2066|2066]] (R4 2017) |
| + | *[[LGA 1200|1200]] (2020) | ||
}} | }} | ||
| Line 95: | Line 96: | ||
*[[Socket 6]] | *[[Socket 6]] | ||
*[[Socket 4|Socket 4]] (1993) | *[[Socket 4|Socket 4]] (1993) | ||
| − | *[[Socket 5|Socket 5]] (1994) | + | *[[Socket 5|Socket 5]] (1994-1995) |
| − | *[[Socket 7|Socket 7]] (1995) | + | *[[Socket 7|Socket 7]] (1995-1997) |
| − | *[[Super Socket 7|Super Socket 7]] (1996) | + | *[[Super Socket 7|Super Socket 7]] (1996-1999) |
}}<noinclude>{{Documentation|content= | }}<noinclude>{{Documentation|content= | ||
Revision as of 07:38, 12 July 2020
See also
- {{Intel technology}}
- {{Intel software}}
- {{Intel processors}}
- {{Intel processor roadmap}}
- {{Intel controllers}}
- {{Early CPU sockets}}
- {{AMD CPU sockets}}
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