Difference between revisions of "Template:Intel processors"
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imported>Arndbergmann m (add a link to sandy-bridge-e) |
(reorg to make navbox more compact) |
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| Line 5: | Line 5: | ||
|listclass = hlist | |listclass = hlist | ||
| − | |||
|list1 = {{Navbox|subgroup | |list1 = {{Navbox|subgroup | ||
| + | |title = Discontinued | ||
| + | |state = {{#ifeq:{{{1|<noinclude>discontinued</noinclude>}}}|discontinued|uncollapse|autocollapse}} | ||
|groupstyle = width:12em | |groupstyle = width:12em | ||
|liststyle = width:auto | |liststyle = width:auto | ||
| Line 31: | Line 32: | ||
|group4 = [[x87]] (external [[Floating-point unit|FPU]]s) | |group4 = [[x87]] (external [[Floating-point unit|FPU]]s) | ||
|list4 = | |list4 = | ||
| − | + | ;8/16-bit databus | |
| − | + | :[[Intel 8087|8087]] | |
| − | + | ;16-bit databus | |
| − | + | :[[80187]] | |
| − | + | :[[Intel 80287|80287]] | |
| − | + | :[[Intel 80387SX|80387SX]] | |
| − | + | ;32-bit databus | |
| − | + | :[[Intel 80387|80387DX]] | |
| − | + | :[[Intel 80487|80487]] | |
|group5 = [[IA-32]] ([[32-bit]]) | |group5 = [[IA-32]] ([[32-bit]]) | ||
| Line 87: | Line 88: | ||
|group7 = Other | |group7 = Other | ||
|list7 = | |list7 = | ||
| − | + | ;[[Complex instruction set computing|CISC]] | |
| − | + | :[[Intel iAPX 432|iAPX 432]] | |
| − | + | ;[[Reduced instruction set computing|RISC]] | |
| − | + | :[[Intel i860|i860]] | |
| − | + | :[[Intel i960|i960]] | |
| − | + | :[[StrongARM]] | |
| + | :[[XScale]] | ||
}} | }} | ||
| − | | | + | |list2 = {{Navbox|subgroup |
| − | | | + | |title = Current |
| − | + | |state = plain | |
| − | + | |groupstyle = width:12em | |
| − | + | |liststyle = width:auto | |
| − | + | ||
| − | + | |group1 = [[IA-32]] ([[32-bit]]) | |
| − | + | |list1 = | |
| − | + | *[[Tolapai|EP80579]] | |
| − | + | *[[Intel Atom|Atom]] ([[Intel Consumer Electronics|CE]]) | |
| − | + | ||
| − | + | |group2 = [[x86-64]] ([[64-bit]]) | |
| − | + | |list2 = | |
| − | + | *[[Intel Atom|Atom (some)]] | |
| − | + | *[[Celeron]] | |
| − | + | *[[Pentium]] | |
| + | *[[Intel Core|Core]] | ||
| + | **[[Core i3|i3]] | ||
| + | **[[Core i5|i5]] | ||
| + | **[[Core i7|i7]] | ||
| + | *[[Xeon]] | ||
| + | |||
| + | |group3 = Other | ||
| + | |list3 = | ||
| + | *[[Itanium#Itanium 2: 2002–2010|Itanium]] | ||
| + | |||
| + | }} | ||
<!-- | <!-- | ||
| Line 152: | Line 165: | ||
*[[List of Intel Xeon microprocessors|Xeon]] | *[[List of Intel Xeon microprocessors|Xeon]] | ||
| − | | | + | |xgroup5 = [[Microarchitecture]]s |
|list5 = {{Navbox|subgroup | |list5 = {{Navbox|subgroup | ||
| + | |title = [[Microarchitecture]]s | ||
| + | |state = plain | ||
| + | |xstate = {{#switch:{{{1|<noinclude>p5</noinclude>}}}|p5|p6|netburst|core|bonnell|nehalem|bridge|haswell|skylake=uncollapse|autocollapse}} | ||
| − | |||
|list1 = {{Navbox|subgroup | |list1 = {{Navbox|subgroup | ||
| − | |title = [[P5 (microarchitecture)|P5]] | + | |title = [[P5 (microarchitecture)|P5]] |
|state = {{#ifeq:{{{1|<noinclude>p5</noinclude>}}}|p5|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>p5</noinclude>}}}|p5|uncollapse|autocollapse}} | ||
| Line 179: | Line 194: | ||
}} | }} | ||
| − | |||
|list2 = {{Navbox|subgroup | |list2 = {{Navbox|subgroup | ||
| − | |title = [[P6 (microarchitecture)|P6]] / [[P6 (microarchitecture)#Revived microarchitecture in Pentium M .28Banias and Dothan.29|Pentium M]] / [[P6 (microarchitecture)#Intel Core .28Yonah.29|Enhanced Pentium M]] | + | |title = [[P6 (microarchitecture)|P6]] / [[P6 (microarchitecture)#Revived microarchitecture in Pentium M .28Banias and Dothan.29|Pentium M]] / [[P6 (microarchitecture)#Intel Core .28Yonah.29|Enhanced Pentium M]] |
|state = {{#ifeq:{{{1|<noinclude>p6</noinclude>}}}|p6|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>p6</noinclude>}}}|p6|uncollapse|autocollapse}} | ||
| Line 229: | Line 243: | ||
}} | }} | ||
| − | |||
|list3 = {{Navbox|subgroup | |list3 = {{Navbox|subgroup | ||
| − | |title = [[NetBurst (microarchitecture)|NetBurst]] | + | |title = [[NetBurst (microarchitecture)|NetBurst]] |
|state = {{#ifeq:{{{1|<noinclude>netburst</noinclude>}}}|netburst|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>netburst</noinclude>}}}|netburst|uncollapse|autocollapse}} | ||
| Line 265: | Line 278: | ||
}} | }} | ||
| − | |||
|list4 = {{Navbox|subgroup | |list4 = {{Navbox|subgroup | ||
| − | |title = [[Core (microarchitecture)|Core]] / [[Intel Core (microarchitecture)#Penryn.2FWolfdale .2845.C2.A0nm.29|Penryn]] | + | |title = [[Core (microarchitecture)|Core]] / [[Intel Core (microarchitecture)#Penryn.2FWolfdale .2845.C2.A0nm.29|Penryn]] |
|state = {{#ifeq:{{{1|<noinclude>core</noinclude>}}}|core|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>core</noinclude>}}}|core|uncollapse|autocollapse}} | ||
| Line 294: | Line 306: | ||
}} | }} | ||
| − | |||
|list5 = {{Navbox|subgroup | |list5 = {{Navbox|subgroup | ||
| − | |title = [[Intel Atom#Bonnell microarchitecture|Bonnell]] | + | |title = [[Intel Atom#Bonnell microarchitecture|Bonnell]] |
|state = {{#ifeq:{{{1|<noinclude>bonnell</noinclude>}}}|bonnell|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>bonnell</noinclude>}}}|bonnell|uncollapse|autocollapse}} | ||
| Line 315: | Line 326: | ||
}} | }} | ||
| − | |||
|list6 = {{Navbox|subgroup | |list6 = {{Navbox|subgroup | ||
| − | |title = [[Nehalem (microarchitecture)|Nehalem]] / [[Nehalem (microarchitecture)#Westmere|Westmere]] | + | |title = [[Nehalem (microarchitecture)|Nehalem]] / [[Nehalem (microarchitecture)#Westmere|Westmere]] |
|state = {{#ifeq:{{{1|<noinclude>nehalem</noinclude>}}}|nehalem|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>nehalem</noinclude>}}}|nehalem|uncollapse|autocollapse}} | ||
| Line 338: | Line 348: | ||
}} | }} | ||
| − | |||
|list7 = {{Navbox|subgroup | |list7 = {{Navbox|subgroup | ||
| − | |title = [[Sandy Bridge]] | + | |title = [[Sandy Bridge]] / [[Ivy Bridge (microarchitecture)|Ivy Bridge]] |
|state = {{#ifeq:{{{1|<noinclude>bridge</noinclude>}}}|bridge|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>bridge</noinclude>}}}|bridge|uncollapse|autocollapse}} | ||
| Line 355: | Line 364: | ||
|list8 = | |list8 = | ||
{{Navbox|subgroup | {{Navbox|subgroup | ||
| − | |title = [[Haswell (microarchitecture)|Haswell]] | + | |title = [[Haswell (microarchitecture)|Haswell]] / [[Broadwell (microarchitecture)|Broadwell]] |
|state = {{#ifeq:{{{1|<noinclude>haswell</noinclude>}}}|haswell|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>haswell</noinclude>}}}|haswell|uncollapse|autocollapse}} | ||
| Line 366: | Line 375: | ||
}} | }} | ||
{{Navbox|subgroup | {{Navbox|subgroup | ||
| − | |title = [[Skylake (microarchitecture)|Skylake]] | + | |title = [[Skylake (microarchitecture)|Skylake]] / [[Skymont (microarchitecture)|Skymont]] |
|state = {{#ifeq:{{{1|<noinclude>skylake</noinclude>}}}|skylake|uncollapse|autocollapse}} | |state = {{#ifeq:{{{1|<noinclude>skylake</noinclude>}}}|skylake|uncollapse|autocollapse}} | ||
Revision as of 20:37, 21 February 2012
ar:قالب:معالجات إنتل bg:Шаблон:Процесори на Intel ca:Plantilla:Processadors Intel cs:Šablona:Procesory od Intelu de:Vorlage:Navigationsleiste Intel-Prozessoren et:Mall:Inteli protsessorid fr:Modèle:Palette Microprocesseurs Intel ko:틀:인텔 프로세서 id:Templat:Intel processors it:Template:Intel processors lt:Šablonas:Intel procesoriai hu:Sablon:Intel processzorok nl:Sjabloon:Navigatie processoren Intel ja:Template:Intel processors no:Mal:Intelprosessorer pl:Szablon:Procesory Intel pt:Predefinição:Processadores Intel ru:Шаблон:Процессоры Intel sk:Šablóna:Procesory Intel fi:Malline:Intelin suorittimet sv:Mall:Intelprocessorer tr:Şablon:Intel işlemciler uk:Шаблон:Процесори Intel vi:Bản mẫu:Vi xử lý Intel zh:Template:Intel处理器列表