Difference between revisions of "Template:Intel processors"
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imported>Vossanova (move Cascade Lake from Future to Skylake) |
imported>Mkouklis(2) (Intel Lakefield system-on-a-chip announced availability 2H-2019) |
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| Line 369: | Line 369: | ||
;10 nm | ;10 nm | ||
:[[Ice Lake (microarchitecture)|Ice Lake]] | :[[Ice Lake (microarchitecture)|Ice Lake]] | ||
| + | ;10 nm | ||
| + | :[[Lakefield (SoC)|Lakefield (system-on-a-chip) ''2H-2019'']]<br /> | ||
:[[Tiger Lake (microarchitecture)|Tiger Lake]] | :[[Tiger Lake (microarchitecture)|Tiger Lake]] | ||
;[[7 nanometer|7 nm]] or 10 nm | ;[[7 nanometer|7 nm]] or 10 nm | ||
Revision as of 10:16, 21 April 2019
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See also
- {{Cpulist}}
- {{Intel technology}}
- {{Intel software}}
- {{Intel processor roadmap}}
- {{Intel CPU sockets}}
- {{Intel controllers}}
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