Difference between revisions of "Template:Intel processors"
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Template documentation
imported>W like wiki (more clear I hope) |
imported>W like wiki (first core, than atom) |
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| list6 = {{Navbox|child | | list6 = {{Navbox|child | ||
| title = [[List of Intel CPU microarchitectures|Microarchitectures]] | | title = [[List of Intel CPU microarchitectures|Microarchitectures]] | ||
| − | | below = <sup>*</sup> {{=}} [[Intel Atom]] | + | | below = <sup>*</sup> {{=}} ''[[Intel Atom]]'' |
| belowstyle = text-align: left; | | belowstyle = text-align: left; | ||
| state = {{{state<includeonly>|uncollapse</includeonly>}}} | | state = {{{state<includeonly>|uncollapse</includeonly>}}} | ||
| Line 288: | Line 288: | ||
:[[Dunnington (microprocessor)|Dunnington]] | :[[Dunnington (microprocessor)|Dunnington]] | ||
| − | | group5 = [[ | + | | group5 = [[Nehalem (microarchitecture)|Nehalem]], [[Westmere (microarchitecture)|Westmere]] |
| list5 = | | list5 = | ||
| + | ;45 nm | ||
| + | :[[Auburndale (microprocessor) |Auburndale]] | ||
| + | :[[Xeon#6500/7500-series "Beckton"|Beckton (Nehalem-EX)]] | ||
| + | :[[Bloomfield (microprocessor)|Bloomfield]] | ||
| + | :[[Clarksfield (microprocessor)|Clarksfield]] | ||
| + | :[[Xeon#5500-series "Gainestown"|Gainestown (Nehalem-EP)]] | ||
| + | :[[Havendale (microprocessor)|Havendale]] | ||
| + | :[[Xeon#C3500/C5500-series "Jasper Forest"|Jasper Forest]] | ||
| + | :[[Lynnfield (microprocessor)|Lynnfield]] | ||
| + | ;32 nm | ||
| + | :[[Arrandale]] | ||
| + | :[[Clarkdale (microprocessor)|Clarkdale]] | ||
| + | :[[Gulftown|Gulftown (Westmere-EP)]] | ||
| + | :[[Nehalem (microarchitecture)#Westmere|Westmere-EX]] | ||
| + | |||
| + | | group6 = ''[[Bonnell (microarchitecture)|Bonnell, Saltwell]]'' <sup>*</sup> | ||
| + | | list6 = | ||
;45 nm | ;45 nm | ||
:[[Silverthorne (microprocessor)|Silverthorne]] | :[[Silverthorne (microprocessor)|Silverthorne]] | ||
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:[[Berryville (SoC)|Berryville]] | :[[Berryville (SoC)|Berryville]] | ||
:[[Centerton (SoC)|Centerton]] | :[[Centerton (SoC)|Centerton]] | ||
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| group7 = [[Sandy Bridge]], [[Ivy Bridge (microarchitecture)|Ivy Bridge]] | | group7 = [[Sandy Bridge]], [[Ivy Bridge (microarchitecture)|Ivy Bridge]] | ||
| Line 341: | Line 341: | ||
:[[Broadwell (microarchitecture)|Broadwell]] | :[[Broadwell (microarchitecture)|Broadwell]] | ||
| − | | group9 = [[Silvermont|Silvermont, Airmont]] <sup>*</sup> | + | | group9 = ''[[Silvermont|Silvermont, Airmont]]'' <sup>*</sup> |
| list9 = | | list9 = | ||
;22 nm | ;22 nm | ||
| Line 362: | Line 362: | ||
:[[Cannon Lake (microarchitecture)|Cannon Lake]] | :[[Cannon Lake (microarchitecture)|Cannon Lake]] | ||
| − | | group11 = Goldmont <sup>*</sup> | + | | group11 = ''Goldmont'' <sup>*</sup> |
| list11 = | | list11 = | ||
;14 nm | ;14 nm | ||
Revision as of 23:12, 29 October 2019
Initial visibility: currently defaults to autocollapse
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See also
- {{Cpulist}}
- {{Intel technology}}
- {{Intel software}}
- {{Intel processor roadmap}}
- {{Intel CPU sockets}}
- {{Intel controllers}}
| Editors can experiment in this template's sandbox (create | mirror) and testcases (create) pages. Subpages of this template. |