Template:AMD Radeon Instinct
Revision as of 07:42, 30 August 2018 by 2a02:810b:c53f:b9e8:a4e0:717b:fbcb:7155 (talk)
| Model | Launch | Code Name | Archi- tecture |
Fab (nm) | Transistors (Billion) | Die Size (mm2) | Bus interface | Clock rate | Core config[lower-alpha 1] | Fillrate | Memory | Processing Power (GFLOPS) |
TDP (Watts) | API support (version) | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Core (MHz) | Boost (MHz) | Memory (MT/s) | Pixel (GP/s) (Boost)[lower-alpha 2] |
Texture (GT/s) (Boost)[lower-alpha 3] |
Size (GiB) | Bus width (bit) | Bus type | Bandwidth (GB/s) | Half Precision (Boost) |
Single Precision (Boost)[lower-alpha 4] |
Double Precision | OpenCL | ||||||||||
| Template:Rh | Radeon Instinct MI6 [1][2][3][4][5] | 2016-12-12 | Polaris 10 | GCN 4th gen | 14 | 5.7 | 232 | PCIe 3.0 x16 | 1120 | 1233 | 1750 7000 eff | 2304:144:32:36 | 39.46 | 177.6 | 16 | 256 | GDDR5 | 224 | 5800 | 5800 | 358 | 150 | 2.0 |
| Template:Rh | Radeon Instinct MI8 [1][2][3][6][7] | Fiji XT | GCN 3rd gen | 28 | 8.9 | 596 | 1000 | 1000 | 1000 | 4096:256:64:64 | 64.0 | 256.0 | 4 | 4096 | HBM | 512 | 8200 | 8200 | 512 | 175 | 2.0 | ||
| Template:Rh | Radeon Instinct MI25 [1][2][3][8][9][10] | Vega 10 XT | GCN 5th gen | 14 | 12.5 | 510 | 1400 | 1500 | 1704 | 4096:256:64:64 | 96.0 | 384 | 16 | 2048 | HBM2 | 436.2 | 24600 | 12300 | 768 | 300 | 2.0 | ||
| Template:Rh | Radeon Instinct MI25 mxgpu (Prototype, near equal Radeon Pro V340 mxgpu)[11] | 2017-06-17 | Vega 10 XT | GCN 5th gen | 14 | 2x 12.5 | 2x 510 | 1400 ? | 1500 ? | 1704 | 2x 4096:256:64:64 | 2x 96.0 ? | 2x 384 ? | 16 | 2048 | HBM2 | 2x 436.2 | 2x 24600 ? | 2x 12300 ? | 2x 768 ? | 300 | 2.0 | |
- ↑ Single-precision shader processors : Texture Mapping Units : Render Output Units (Compute Units)
- ↑ Pixel fillrate is calculated as the number of ROPs multiplied by the base (or boost) core clock speed.
- ↑ Texture fillrate is calculated as the number of TMUs multiplied by the base (or boost) core clock speed.
- ↑ Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
References
- ↑ 1.0 1.1 1.2 Smith, Ryan (12 December 2016). "AMD Announces Radeon Instinct: GPU Accelerators for Deep Learning, Coming in 2017". Anandtech. Retrieved 12 December 2016.
- ↑ 2.0 2.1 2.2 Shrout, Ryan (12 December 2016). "Radeon Instinct Machine Learning GPUs include Vega, Preview Performance". PC Per. Retrieved 12 December 2016.
- ↑ 3.0 3.1 3.2 Kampman, Jeff (12 December 2016). "AMD opens up machine learning with Radeon Instinct". TechReport. Retrieved 12 December 2016.
- ↑ "Radeon Instinct MI6". Radeon Instinct. AMD. Retrieved 22 June 2017.
- ↑ https://www.techpowerup.com/gpudb/2927/radeon-instinct-mi6
- ↑ "Radeon Instinct MI8". Radeon Instinct. AMD. Retrieved 22 June 2017.
- ↑ https://www.techpowerup.com/gpudb/2928/radeon-instinct-mi8
- ↑ Smith, Ryan (5 January 2017). "The AMD Vega Architecture Teaser: Higher IPC, Tiling, & More, coming in H1'2017". Anandtech.com. Retrieved 10 January 2017.
- ↑ "Radeon Instinct MI25". Radeon Instinct. AMD. Retrieved 22 June 2017.
- ↑ https://www.techpowerup.com/gpudb/2983/radeon-instinct-mi25
- ↑ https://www.techpowerup.com/gpudb/3269/radeon-instinct-mi25-mxgpu