Template:Cpulist/doc
cpulist is a template for maintaining lists of microprocessors with separate content and markup. Please help to convert the lists of microprocessors from Template:Intel processors to this template, in order to give them all a consistent appearance.
As a simple example,
{{cpulist|nehalem|head}}
{{cpulist|nehalem|gainestown|model=Xeon E5502
|l3=4|qpi=4.8|mult=14|memspeed=800|vmin=0.75|vmax=1.35|tdp=80|date=March 30, 2009|price=$188|links=1
|sspec1=SLBEZ|step1=D0|part1=AT80602000804AA}}
{{end}}
results in a table like
| Model number |
sSpec number |
Frequency | Turbo | Cores | L2 cache |
L3 cache |
I/O bus | Mult. | Memory | Voltage | TDP | Socket | Release date | Part number(s) |
Release price (USD) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Xeon E5502 |
|
1.87 GHz | N/A | 4 | 4 × 256 KiB | 4 MiB | 2 × 4.8 GT/s QPI | 14× | 3 × DDR3-800 | 0.75–1.35 V | 80 W
|
LGA 1366 | March 30, 2009 |
|
$188 |
Making changes to the cpulist template affects all articles using it, see Special:WhatLinksHere/Template:Cpulist for a list.
Here is the list of cpulist sub-templates:
Template arguments
The first argument to the cpulist template, nehalem in the example, defines the layout of the table. Currently, valid arguments here are
- lake-e For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
- skylake For lists of the (Skylake-SP/F/W/X and Kaby Lake-X) generation of processors, including fields for burst frequency
- silvermont For lists of the latest (Silvermont/Airmont) generation of low-power processors, including fields for sdp and burst frequency
- haswell: For lists of the latest (Haswell/Broadwell) generation of processors, showing only the fields that are known to date
- bridge-e: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- bridge: For lists of the previous (Sandy Bridge/Ivy Bridge) generation of processors, showing only the fields that are known to date
- nehalem: For lists of Intel's previous (Nehalem/Westmere) generation of processors, including fields for 'Turbo' mode, L3 cache and Memory Controller
- nehgfx: like nehalem, but for chips with integrated graphics capability
- atom: For lists of low-end Atom processors, currently same format as core
- atomgfx: For lists of Atom processors with integrated graphics
- core: For lists of Intel's previous generation of processors
- p6: For lists of Intel's p6 generation of processors
- p5: For lists of Intel's p5 generation of processors
The second argument is the type of processor, defining default contents for many fields that are identical throughout a series of processors. This argument is optional, valid arguments are currently
- head: A special argument, resulting in a table header
- baytrail
- haswell
- ivybridge
- sandybridge
- sandybridge_e
- gulftown
- gulftownup
- clarkdale
- arrandale
- beckton
- bloomfield
- gainestown
- lynnfield
- clarksfield
- jasperforest
- diamondville
- silverthorne
- pineview
- dunnington
- harpertown
- yorkfield
- wolfdale
- penryn, penrynulv
- tigerton
- clovertown
- kentsfield
- woodcrest
- conroe
- merom
- sossaman
- yonah
- dothan
- banias
- tillamook
- p5
Other arguments are
model: The name of the processorsspecorsspec1-sspec8: up to 8 Intel sSpec numbersstep1-step8: up to 8 stepping names for the above sSpec numbers
freq: Core frequency, can often be determined by fsb and mult arguments, in MHz or GHzuncore: Uncore frequency, in MHz or GHzturbo: Turbo frequencies , as increments in clock multiplierburst: Burst frequencies , in GHzigp: Model of integrated graphics processorgfxfreq: clock frequency of the integrated graphics, if applicablecores: number of processor coresl1: size of the Level 1 Cache, in KBl2: size of the Level 2 Cache, in KB or MBl3: size of the Level 3 Cache, in MBiobus: Type and speed of I/O bus interface, may be expressed as one offsb: performance of Front-side bus in MT/s, if applicableht: performance of Hypertransport in MT/s, if applicableqpi: performance of Quickpath interface in MT/s, if applicabledmi: set to 1 if Direct media interface is in use
mult: clock multiplier of fsb or base frequencymem: memory interface of integrated memory controller, may be expressed asmemspeed: data rate of integrated memory controller
volt: core voltage range, usually given asvmin: minimum voltage in voltsvmax: maximum voltage (optional) in volts
tdportdp1-tdp8: Thermal design power in wattssdp: Scenario design power in wattssockorsock1-sock8: Socket, one of 1567, 1366, 1156, 775, 771, M, P, 956, 478, 479, 603, 604 or some othersdate: release datepartorpart1-part8: part numbersprice: price in USD at the time of release
A special argument is
- links: If set to any string, wikilinks are added to various units in the table row, usually this is used in the first row of a table